MT16VDDT3264 Micron, MT16VDDT3264 Datasheet - Page 13

• Manufacturer Part Number: MT16VDDT3264
• Description: 184-Pin DDR SDRAM DIMMs (x64)
• Manufacturer: Micron

I
(Notes: 1-5, 8, 10, 12; notes appear following parameter tables)
(0°C ≤ T
32, 64 Meg x 64 DDR SDRAM DIMMs
DD16C32_64X64AG_C.p65 – Rev. C; Pub. 3/02
*DRAM components only
a - Value calculated as one module bank in this operating condition, and all other banks in I
b - Value calculated reflects all module banks in this operating condition.
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
t
changing once per clock cyle; Address and control inputs
changing once every two clock cycles
OPERATING CURRENT: One device bank; Active-Read-Precharge;
Burst = 2;
Address and control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device
banks idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
t
changing once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank
active; Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device
bank; Active-Precharge;
DM andDQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst;
One bank active; Address and control inputs changing once per
clock cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst;
One device bank active; Address and control inputs changing
once per clock cycle;
changing twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE ≤ 0.2V
OPERATING CURRENT: Four device bank interleaving
READs (BL = 4) with auto precharge,
allowed;
only during Active READ, or WRITE commands.
DD
RC =
CK =
SPECIFICATIONS AND CONDITIONS
t
t
CK MIN; CKE = HIGH; Address and other control inputs
RC (MIN);
A
≤ +70°C; V
t
CK =
t
RC =
t
CK =
t
CK (MIN); Address and control inputs change
t
t
RC (MIN);
t
CK =
CK (MIN); I
DD
t
CK =
Q = +2.5V ±0.2V, V
t
t
CK (MIN); DQ, DM and DQS inputs
RC =
t
t
t
CK (MIN); DQ, DM, and DQS inputs
CK =
CK =
OUT
t
RAS (MAX);
IN
t
= 0mA
CK =
t
t
CK (MIN); CKE = LOW
CK (MIN); I
= V
REF
t
t
RC = minimum
CK (MIN); CKE = (LOW)
for DQ, DQS, and DM
DD
t
CK =
= +2.5V ±0.2V)
OUT
t
t
RFC =
RC = 7.8125µs
t
= 0mA;
CK (MIN); DQ,
*
(512MB MODULE)
t
t
RFC(MIN)
RC
13
Micron Technology, Inc., reserves the right to change products or specifications without notice.
I
I
I
I
I
SYM
I
I
DD
184-PIN DDR SDRAM DIMMs
I
DD
DD
DD
I
DD
I
I
I
DD
DD
DD
DD
DD
DD
DD
4W
3N
5A
2P
4R
2F
3P
0
1
5
8
7
a
b
b
a
a
b
b
b
a
b
b
a
-335
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
256MB, 512MB (x64)
DD
2P, power-down mode.
-26A/-265
MAX
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
-202
TBD
UNITS NOTES
©2002, Micron Technology, Inc.
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28,
21, 28,
20, 43
20, 43
20, 43
20, 45
24, 45
20, 44
45
46
45
42
20
9