MT90870 Zarlink Semiconductor, Inc., MT90870 Datasheet - Page 56
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MT90870
Manufacturer Part Number
MT90870
Description
Flexible 12k Digital Switch (F12kDX)
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.MT90870.pdf
(77 pages)
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MT90870
13.10.3
Address 00C5h
Local BER Receive Length Register (LRXBLR) defines how many channels the BER sequence will be
received during each frame. The LRXBLR register is configured as follows:
13.10.4
Address 00C6h
Local BER Start Receive Register defines the Input Stream and Start Channel and the stream in which the BER
sequence shall be received. The LBSRR register is configured as follows:
13.10.5
Address 00C7h
Local BER Count Register contains the number of counted errors. This register is read only. The LBCR register
is configured as follows:
56
15-12
15-0
15-8
11-8
Bit
7-0
Bit
7-0
Bit
Local BER Start Receive Register (LBSRR)
Local Receive BER Length Register (LRXBLR)
Local BER Count Register (LBCR)
LBC(15:0)
LRXBL(7:0)
LBRSA(3:0)
LBRCA(7:0)
Reserved
Reserved
Name
Name
Name
Table 33 - Local Receive BER Length Register (LRXBLR) Bits
Table 34 - Local BER Start Receive Register (LBSRR) Bits
Reset
Table 35 - Local BER Count Register (LBCR) Bits
Reset
0
Reset
0
0
0
0
0
Local Bit Error Rate Count
The binary value of the bits define the Local Bit Error count.
Reserved.
Local Receive BER Length Bits
The binary value of these bits define the number of channels in addition
to the Start Channel allocated for the BER receiver. (i.e. Total Channels =
Start Channel + LRXBL value)
Reserved.
Local BER Receive Stream Address Bits
The binary value of these bits refers to the Local input stream to receive
the BER data.
Local BER Receive Channel Address Bits
The binary value of these bits refers to the Local input channel in which
the BER data starts to be compared.
Description
Description
Description
Preliminary Information