si4330 Silicon Laboratories, si4330 Datasheet - Page 33

• Manufacturer Part Number: si4330
• Description: Si4330 Ism Receiver
• Manufacturer: Silicon Laboratories

6. Data Handling and Packet Handler
6.1. RX FIFO
A 64 byte FIFO is integrated into the chip for RX, as shown in Figure 11. "Register 7Fh. FIFO Access" is used to
access the FIFO. A burst read, as described in "3.1. Serial Peripheral Interface (SPI)" on page 16, from address
7Fh will read data from the RX FIFO.
The RX FIFO has one programmable threshold called the FIFO Almost Full Threshold, rxafthr[5:0]. When the
incoming RX data reaches the Almost Full Threshold an interrupt will be generated to the microcontroller via the
nIRQ pin. The microcontroller will then need to read the data from the RX FIFO.
The RX FIFO may be cleared or reset with the ffclrrx bit in “Register 08h. Operating Mode and Function Control 2,”
on page 79. All interrupts may be enabled by setting the Interrupt Enabled bits in "Register 05h. Interrupt Enable 1"
and “Register 06h. Interrupt Enable 2,” on page 77. If the interrupts are not enabled the function will not generate
an interrupt on the nIRQ pin but the bits will still be read correctly in the Interrupt Status registers.
Add R/W Function/D
Add R/W Function/De
7E
08
R/W
R/W
escription
Operating &
scription
Control 2
RX FIFO
Function
Control
antdiv[2] antdiv[1] antdiv[0]
Reserved Reserved rxafthr[5] rxafthr[4] rxafthr[3] rxafthr[2] rxafthr[1] rxafthr[0]
D7
D7
D6
D6
Figure 11. FIFO Threshold
RX FIFO
D5
Preliminary Rev 0.2
D5
rxmpk
D4
D4
RX FIFO Almost Full
Reserved
Threshold
D3
D3
enldm
D2
D2
ffclrrx
D1
D1
Reserved
D0
D0
Si4330
POR Def.
POR
00h
Def.
37h
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