si4330 Silicon Laboratories, si4330 Datasheet - Page 94

• Manufacturer Part Number: si4330
• Description: Si4330 Ism Receiver
• Manufacturer: Silicon Laboratories

Register 1Fh. Clock Recovery Gearshift Override
Si4330
Reset value = 00000011
The gear-shift register controls BCR loop gain. Before the preamble is detected, BCR loop gain is as follows:
Once the preamble is detected, internal state machine automatically shift BCR loop gain to the following:
crfast = 3’b000 and crslow = 3’b101 are recommended for most applications. The value of “crslow” should be
greater than “crfast”.
94
Name
Type
Bit
5:3
2:0
Bit
7
6
Reserved
crslow[2:0]
crfast[2:0]
Reserved
rxready
R/W
Name
D7
rxready
Reserved.
Improves Receiver Noise Immunity when in Direct Mode.
It is recommended to set this bit after preamble is detected. When in FIFO mode this bit
should be set to “0” since noise immunity is controlled automatically.
Clock Recovery Fast Gearshift Value.
Clock Recovery Slow Gearshift Value.
R/W
D6
D5
BCRLoopGai
BCRLoopGai
Preliminary Rev 0.2
crfast[2:0]
R/W
D4
n
n


crgain
crgain
2
2
Function
crslow
crfast
D3
D2
crslow[2:0]
R/W
D1
D0