mt46h32m16lf Micron Semiconductor Products, mt46h32m16lf Datasheet - Page 70

• Manufacturer Part Number: mt46h32m16lf
• Description: 512mb X16, X32 Mobile Ddr Sdram
• Manufacturer: Micron Semiconductor Products

Figure 34:
PDF: 09005aef82ce3074/Source: 09005aef82ce20c9
ddr_mobile_sdram_cmd_op_timing_dia_fr3.08__3.fm - Rev. D 05/08 EN
Command
Address
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
WRITE-to-PRECHARGE – Odd Number of Data, Interrupting
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
Notes:
Bank a,
WRITE
Col b
T0
1. PRE = PRECHARGE.
2.
3. D
4. An interrupted burst of 8 is shown; one data element is written.
5. DQS is required at T4 and T4n to register DM.
6. If the burst of 4 is used, DQS and DM are not required at T3, T3n, T4, and T4n.
7. A10 is LOW with the WRITE command (auto precharge is disabled).
t DQSS
t DQSS
t DQSS
t
WR is referenced from the first positive CK edge after the last data-in pair.
IN
D
b = data-in for column b.
b
IN
NOP
D
T1
b
IN
3
D
b
IN
T1n
NOP
T2
T2n
70
T3
NOP
t WR
T3n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2
NOP
T4
Don’t Care
T4n
(a or all)
T5
PRE
Bank
1
Mobile DDR SDRAM
©2007 Micron Technology, Inc. All rights reserved
Transitioning Data
T6
NOP
Operations