stlc5465 STMicroelectronics, stlc5465 Datasheet - Page 45

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stlc5465

Manufacturer Part Number
stlc5465
Description
Multi Hdlc With Switching Matrix Associated
Manufacturer
STMicroelectronics
Datasheet

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0
V - CLOCK TIMING
V.1 - Synchronization Signals delivered by the system
For one of three different input synchronizations which is programmed, FSCG and FSCV* signals
delivered by the Multi-HDLC are in accordance with the figure hereafter.
Figure 34 : Clocks received and delivered by the Multi-HDLC
Symbol
t4GCI
t1
t2
t3
t4
t5
t6
C LO C K B
C LO C K A
1) S y Mode
2) GC I M ode
3) V * Mode
D IN 0 /8 , E C H O
D O U T 0 /7 , C B
i f F S = F SC G
TD M 0/7
FSC G d el i ver ed
by th e c i r cui t
FSC V* d el i ver ed
by th e c i r cui t
Fr am e A ( o r B )
Fr am e A ( o r B )
Fr am e A ( o r B )
Clock Period if 4096kHz (3072)
Clock Period if 8192kHz (6144)
Delay between Clock A and Clock B
Set up time Frame A (or B)/CLOCK A (or B)
Hold time Frame A (or B)/CLOCK A (or B)
Clock ratio t5h/t5l
Duration of FSCG
t3
3
Bi t3
Parameter
t2
The fo u r Mul ti p l ex Confi g ur ati o n Regi ste r s a r e a t z er o ( n o d el ay) .
t5 h
t4
4
Bi t4
Ti m e S l ot 3 1
5
Bi t5
t5 l
t3
239 (320)
120 (158)
6
Min.
- 60
Bi t6
10
10
10
75
t1
244 (325)
122 (162)
7
Bi t7
Typ.
100
488
t4
0
t3
t6
0
Bi t0
125000 - (t1 - 10)
Ti m e S l ot 0
249 (330)
125 (165)
t4 CG I
Max.
t1-10
t1-10
+60
125
STLC5465B
1
Bi t1
Unit
45/101
ns
ns
ns
ns
ns
ns
%

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