stlc5465 STMicroelectronics, stlc5465 Datasheet - Page 93

• Manufacturer Part Number: stlc5465
• Description: Multi Hdlc With Switching Matrix Associated
• Manufacturer: STMicroelectronics

IX - EXTERNAL REGISTERS
These registers are located in shared memory. Initiate Block Address Register (IBAR) gives the Initiate
Block Address (IBA) in shared memory (see Register IBAR(34)H on Page 90).
‘Not used’ bits (Nu) are accessible by the microprocessor but the use of these bits by software is not
recommended.
IX.1 - Initialization Block in External Memory
When Direct Memory Access Controller receives Start from one of 64 channels, it reads initialization block
immediately to know the first address of the first descriptor for this channel.
Bit 0 of Transmit Descriptor Address (TDA Low) and bit 0 of Receive Descriptor Address (RDA Low), are
at ZERO mandatory. This Least Significant Bit is not used by DMA Controller, The shared memory is
always a 16 bit memory for the DMA Controller.
N.B. If several descriptors are used to transmit one frame then before transmitting frame, DMA Controller
stores the address of the first Transmit Descriptor Address into this Initialization Block.
CH 31
CH30
CH 0
CH 2
CH1
to
Channel
R
R
R
T
T
T
Address
IBA+246
IBA+248
IBA+250
IBA+252
IBA+254
IBA+00
IBA+02
IBA+04
IBA+06
IBA+08
IBA+10
IBA+12
IBA+14
IBA+16
to
bit15
Not used
Not used
Not used
Not used
Not used
Not used
Transmit Descriptor Address (TDA Low)
Transmit Descriptor Address (TDA Low)
Transmit Descriptor Address (TDA Low)
Receive Descriptor Address (RDA Low)
Receive Descriptor Address (RDA Low)
Receive Descriptor Address (RDA Low)
bit8
Descriptor Address
bit7
RDA High
RDA High
RDA High
TDA High
TDA High
TDA High
STLC5465B
bit0
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