pnx1500 NXP Semiconductors, pnx1500 Datasheet - Page 485

• Manufacturer Part Number: pnx1500
• Description: Pnx15xx Series Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
Figure 1:
MMIO/DCS Bus
Top Level Block Diagram
VDI Pads
32
1.1 FGPI Overview
Refer to
module to the MMIO and MTL Busses within the PNX15xx Series. All external FGPI
signals are registered and routed through the Input Router module before being
presented to the FPGI module. Latency buffering of data and endian conversion is
done in the MTL DTL Adapter. All FGPI register access is through the MMIO DTL
adapter.
Input Router
Clock Block
Figure
1. This block diagram shows the top level connection of the FGPI
32
Rev. 3 — 17 March 2006
32
Chapter 14: FGPI: Fast General Purpose Interface
32
32
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
64
MTL Bus
14-2