pnx1500 NXP Semiconductors, pnx1500 Datasheet - Page 737

• Manufacturer Part Number: pnx1500
• Description: Pnx15xx Series Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
5.14.1 Enabling and Disabling Reception
5.14 Enabling and Disabling Receive and Transmit
When a magic packet is detected, apart from the WakeupInt bit in the IntStatus
register, the MagicPacketWoL bit is set in the RxFilterWoLStatus register. Software
can reset the bit by writing a 1 to the corresponding bit of the RxFilterWoLClear
register.
Magic Packet WoL Example
An example of a Magic Packet with station address 11h 22h 33h 44h 55h 66h is as
follows. MISC indicates miscellaneous additional data bytes in the packet.
DESTINATION SOURCE MISC FF FF FF FF FF
FF 11 22 33 44 55 66 11 22 33 44 55 66 11 22 33 44
55 66 11 22 33 44 55 66 11 22 33 44 55 66 11 22 33
44 55 66 11 22 33 44 55 66 11 22 33 44 55 66 11 22
33 44 55 66 11 22 33 44 55 66 11 22 33 44 55 66 11
22 33 44 55 66 11 22 33 44 55 66 11 22 33 44 55 66
11 22 33 44 55 66 11 22 33 44 55 66 MISC CRC
After reset, the receive function of the LAN100 is disabled. The receive function can
be enabled by the device driver by setting the RxEnable bit in the Command register
and the RECEIVE_ENABLE bit in the MAC1 configuration register of the LAN100.
The status of the Receive Datapath can be monitored by the device driver by reading
the RxStatus bit of the Status register. Figure 14 illustrates the finite state machine
(FSM) for generating the RxStatus bit.
Figure 14: Receive Active/Inactive state machine
RxEnable
Reset
Rev. 3 — 17 March 2006
Chapter 23: LAN100 — Ethernet Media Access Controller
RxStatus=1
RxStatus=0
INACTIVE
ACTIVE
!RxEnable && not busy receiving
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
23-68