cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 16

• Manufacturer Part Number: cy8c5588pvi-115es0
• Description: Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
• Manufacturer: Cypress Semiconductor Corporation.

Figure 5-1
synchronous and asynchronous memories. The CY8C55 only
supports one type of external memory device at a time.
5.1 Memory Map
The Cortex-M3 has a fixed address map, which allows
peripherals to be accessed by simple memory access
instructions.
5.1.1 Address Map
The 4-GB address space is divided into the ranges shown in
Table
Document Number: 001-44094 Rev. *J
5-1:
is the EMIF block diagram. The EMIF supports
PHUB
Data,
Address,
and Control
Signals
Data,
Address,
Signals
Data,
Address,
and Control
Signals
and Control
IO IF
EM Control
Signals
PRELIMINARY
Figure 5-1. EMIF Block Diagram
EMIF
UDB
Data Signals
Control Signals
Address Signals
Signals
Other
Control
DSI to Port
External memory is located in the Cortex-M3 external RAM
space; it can use up to 24 address bits. See
16Memory Map on page
wide. Cortex-M3 instructions can be fetched/executed from
external memory, although at a slower rate than from flash.
Table 5-1. Address Map
DSI Dynamic Output
Control
0x00000000 –
0x1FFFFFFF
0x20000000 –
0x3FFFFFFF
0x40000000 –
0x5FFFFFFF
PSoC
Address Range
PORTs
PORTs
PORTs
I/O
I/O
I/O
®
External _ MEM_ ADDR [23:0]
External _ MEM_ DATA[15:0]
5: CY8C55 Family Datasheet
Control
0.5 GB Program code. This includes
0.5 GB Static RAM. This includes a 1
0.5 GB Peripherals. This includes a
16. The memory can be 8 or 16 bits
Size
the exception vector table at
power up, which starts at
address 0.
MByte bit-band region
starting at 0x20000000 and a
32 Mbyte bit-band alias
region starting at
0x22000000.
1 MByte bit-band region
starting at 0x40000000 and a
32 Mbyte bit-band alias
region starting at
0x42000000.
Table 5-1 on page
Use
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