cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 23
![no-image](/images/manufacturer_photos/0/1/180/cypress_semiconductor_corporation__sml.jpg)
cy8c5588pvi-115es0
Manufacturer Part Number
cy8c5588pvi-115es0
Description
Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY8C5588PVI-115ES0.pdf
(102 pages)
6.0.0.2 Alternate Active Mode
Alternate Active mode is very similar to Active mode. In alternate
active mode, fewer subsystems are enabled, to reduce power
consumption. One possible configuration is to turn off the CPU
and flash, and run peripherals at full speed.
6.0.0.3 Sleep Mode
Sleep mode reduces power consumption when a resume time of
15 µs is acceptable. The wake time is used to ensure that the
regulator outputs are stable enough to directly enter active
mode.
6.0.0.4 Hibernate Mode
In hibernate mode nearly all of the internal functions are
disabled. Internal voltages are reduced to the minimal level to
keep vital systems alive. Configuration state is preserved in
hibernate mode and SRAM memory is retained. GPIOs
configured as digital outputs maintain their previous values and
external GPIO pin interrupt settings are preserved. The device
can only return from hibernate mode in response to an external
I/O interrupt. The resume time from hibernate mode is less than
100 µs.
6.0.0.5 Wakeup Events
Wakeup events are configurable and can come from an interrupt
or device reset. A wakeup event restores the system to active
mode. Interrupt sources include internally generated interrupts,
power supervisor, central timewheel, and I/O interrupts. Internal
interrupt sources can come from a variety of peripherals, such
as analog comparators and UDBs. The central timewheel
provides periodic interrupts to allow the system to wake up, poll
peripherals, or perform real-time functions. Reset event sources
include the external reset I/O pin (XRES), WDT, and Precision
Reset (PRES).
6.0.1 Boost Converter
Applications that use a supply voltage of less than 1.71 V, such
as solar or single cell battery supplies, may use the on-chip boost
converter. The boost converter may also be used in any system
that requires a higher operating voltage than the supply provides.
For instance, this includes driving 5.0 V LCD glass in a 3.3 V
system. The boost converter accepts an input voltage as low as
0.5 V. With one low cost inductor it produces a selectable output
voltage sourcing enough current to operate the PSoC and other
on-board components.
The boost converter accepts an input voltage from 0.5 V to 5.5 V
(V
provides a user configurable output voltage of 1.8 to 5.0 V
(V
than or equal to V
The block can deliver up to 50 mA (I
configuration.
Four pins are associated with the boost converter: V
V
V
inputs. An inductor is connected between the V
The designer can optimize the inductor value to increase the
boost converter efficiency based on input voltage, output
voltage, current and switching frequency. The External Schottky
diode shown in
V
Document Number: 001-44094 Rev. *J
BOOST
BOOST
BOOST
BAT
BOOST
), and can start up with V
, and Ind. The boosted output voltage is sensed at the
>3.6 V.
pin and must be connected directly to the chip’s supply
). V
BAT
Figure 6-6
is typically less than V
BOOST
, then V
is required only in cases when
BAT
BOOST
as low as 0.5 V. The converter
BOOST
will be the same as V
BOOST
) depending on
; if V
PRELIMINARY
BAT
BAT
and Ind pins.
BAT
is greater
, V
SSB
BAT
,
.
Figure 6-6. Application for Boost Converter
The boost converter can be operated in two different modes:
active and standby. Active mode is the normal mode of operation
where the boost regulator actively generates a regulated output
voltage. In standby mode, most boost functions are disabled,
thus reducing power consumption of the boost circuit. The
converter can be configured to provide low power, low current
regulation in the standby mode. The external 32 kHz crystal can
be used to generate inductor boost pulses on the rising and
falling edge of the clock when the output voltage is less than the
programmed value. This is called automatic thump mode (ATM).
The boost typically draws 200 µA in active mode and 12 µA in
standby mode. The boost operating modes must be used in
conjunction with chip power modes to minimize the total chip
power consumption.
available in different chip power modes.
Table 6-1. Chip and Boost Power Modes Compatibility
The switching frequency can be set to 100 kHz, 400 kHz, 2 MHz,
or 32 kHz to optimize efficiency and component cost. The
100 kHz, 400 kHz, and 2 MHz switching frequencies are
generated using oscillators internal to the boost converter block.
When the 32 kHz switching frequency is selected, the clock is
derived from a 32 kHz external crystal oscillator. The 32 kHz
external clock is primarily intended for boost standby mode.
If the boost converter is not used in a given application, tie the
V
unconnected.
Chip -Active mode
Chip -Sleep mode
Chip-Hibernate mode
BAT
required when Vdd
Chip Power Modes
Optional Schottky
PSoC
Diode. Only
, V
>3.6 V.
SSB
, and V
®
22
µF
5: CY8C55 Family Datasheet
BOOST
10 µH
Table 6-1
Boost can be operated in either active
or standby mode.
Boost can be operated in either active
or standby mode. However, it is recom-
mended to operate boost in standby
mode for low power consumption
Boost can only be operated in active
mode. However, it is recommended not
to use boost in chip hibernate mode
due to high current consumption in
boost active mode
pins to ground and leave the Ind pin
V
IND
V
V
boost
ssb
bat
V
lists the boost power modes
dda
PSoC
Boost Power Modes
V
ddd
V
V
ssa
ssd
22
µF
0.1
µF
Page 23 of 102
[+] Feedback
[+] Feedback
[+] Feedback
[+] Feedback