cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 6

• Manufacturer Part Number: cy8c5588pvi-115es0
• Description: Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
• Manufacturer: Cypress Semiconductor Corporation.

Document Number: 001-44094 Rev. *J
Notes
3. Pins are No Connect (NC) on devices without USB. NC means that the pin has no electrical connection. The pin can be left floating or tied to a supply voltage or ground.
4. The center pad on the QFN package should be connected to digital ground (V
ground, it should be electrically floated and not connected to any other signal.
(configurable XRES, GPIO) P1[2]
(TRACEDATA[2], GPIO) P2[6]
(TRACEDATA[3], GPIO) P2[7]
(TCK, SWDCK, GPIO) P1[1]
(TMS, SWDIO, GPIO) P1[0]
(TDO, SWV, GPIO) P1[3]
(I2C0: SDA, SIO) P12[5]
(I2C0: SCL, SIO) P12[4]
(nTRST, GPIO) P1[5]
(TDI, GPIO) P1[4]
(OpAmp0-/Extref0, GPIO) P0[3]
(TRACEDATA[0], GPIO) P2[4]
(TRACEDATA[1], GPIO) P2[5]
(TRACEDATA[2], GPIO) P2[6]
(TRACEDATA[3], GPIO) P2[7]
(OpAmp2out, GPIO) P0[0]
(OpAmp0out, GPIO) P0[1]
(TRACECLK, GPIO) P2[3]
Vboost
Vddio1
XRES
Vssb
Vssd
(OpAmp0+, GPIO) P0[2]
(OpAmp2+, GPIO) P0[4]
Vbat
(OpAmp2-, GPIO) P0[5]
Ind
(IDAC0, GPIO) P0[6]
(IDAC2, GPIO) P0[7]
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
8
9
Figure 2-1. 48-pin SSOP Part Pinout
PRELIMINARY
(SIO) P12[2]
(SIO) P12[3]
Figure 2-2. 68-pin QFN Part Pinout
Lines show Vddio
to I/O supply
association
Vddio0
Vddio2
Vboost
Vddd
Vccd
Vssd
Vssb
Vbat
Ind
23
(Top View)
10
11
12
13
14
15
16
17
18
19
20
21
22
24
1
2
3
4
5
6
7
8
9
QFN
Lines show
Vddio to I/O
supply
association
SSOP
SSD
) for best mechanical, thermal, and electrical performance. If not connected to
PSoC
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Vdda
Vssa
Vcca
P15[3] (GPIO, kHz XTAL: Xi)
P15[2] (GPIO, kHz XTAL: Xo)
P12[1] (SIO, I2C1: SDA)
P12[0] (SIO, I2C1: SCL)
Vddio3
P15[1] (GPIO, MHz XTAL: Xi)
P15[0] (GPIO, MHz XTAL: Xo)
Vccd
Vssd
Vddd
P15[7] (USBIO, D-, SWDCK)
P15[6] (USBIO, D+, SWDIO)
P1[7] (GPIO)
P1[6] (GPIO)
Vddio1
P1[5] (GPIO, nTRST)
P1[4] (GPIO, TDI)
P1[3] (GPIO, TDO, SWV)
P1[2] (GPIO, configurable XRES)
P1[1] (GPIO, TCK, SWDCK)
P1[0] (GPIO, TMS, SWDIO)
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
®
P0[3] (GPIO, OpAmp0-/Extref0)
P0[2] (GPIO, OpAmp0+)
P0[1] (GPIO, OpAmp0out)
P0[0] (GPIO, OpAmp2out)
P12[3] (SIO)
P12[2] (SIO)
Vssd
Vdda
Vssa
Vcca
P15[3] (GPIO, kHz XTAL: Xi)
P15[2] (GPIO, kHz XTAL: Xo)
P12[1] (SIO, I2C1: SDA)
P12[0] (SIO, 12C1: SCL)
P3[7] (GPIO, OpAmp3out)
P3[6] (GPIO, OpAmp1out)
Vddio3
[4]
5: CY8C55 Family Datasheet
[3]
Page 6 of 102
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