mc68hc908lj24 Freescale Semiconductor, Inc, mc68hc908lj24 Datasheet - Page 295

• Manufacturer Part Number: mc68hc908lj24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
CAPTURE STROBE
FOR REFERENCE
SPSCK; CPOL = 0
MASTER SS
SPSCK; CPOL =1
SPSCK CYCLE #
MISO/MOSI
FROM MASTER
SS; TO SLAVE
SLAVE SS
SLAVE SS
CPHA = 0
CPHA = 1
FROM SLAVE
MOSI
MISO
Figure 14-4. Transmission Format (CPHA = 0)
When CPHA = 0 for a slave, the falling edge of SS indicates the
beginning of the transmission. This causes the SPI to leave its idle state
and begin driving the MISO pin with the MSB of its data. Once the
transmission begins, no new data is allowed into the shift register from
the transmit data register. Therefore, the SPI data register of the slave
must be loaded with transmit data before the falling edge of SS. Any data
written after the falling edge is stored in the transmit data register and
transferred to the shift register after the current transmission.
Serial Peripheral Interface Module (SPI)
MSB
Figure 14-5. CPHA/SS Timing
BYTE 1
MSB
1
BIT 6
BIT 6
2
BIT 5
BIT 5
3
BYTE 2
BIT 4
BIT 4
4
BIT 3
BIT 3
5
Serial Peripheral Interface Module (SPI)
BIT 2
BIT 2
6
BYTE 3
BIT 1
BIT 1
7
LSB
LSB
8
Transmission Formats
Data Sheet
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