mc68hc908lj24 Freescale Semiconductor, Inc, mc68hc908lj24 Datasheet - Page 398

• Manufacturer Part Number: mc68hc908lj24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Input/Output (I/O) Ports
18.8.2 Data Direction Register F (DDRF)
Data Sheet
398
NOTE:
NOTE:
Address:
Data direction register F determines whether each port F pin is an input
or an output. Writing a logic 1 to a DDRF bit enables the output buffer for
the corresponding port F pin; a logic 0 disables the output buffer.
For those devices packaged in a 64-pin package, PTF0–PTF7 are
connected to ground internally. DDRF0–DDRF7 should be set to a 0 to
configure PTF0–PTF7 as inputs.
DDRF[7:0] — Data Direction Register F Bits
Avoid glitches on port F pins by writing to the port F data register before
changing data direction register F bits from 0 to 1.
the port F I/O logic.
Reset:
Read:
Write:
These read/write bits control port F data direction. Reset clears
DDRF[7:0], configuring all port F pins as inputs.
1 = Corresponding port F pin configured as output
0 = Corresponding port F pin configured as input
DDRF7
READ DDRF ($000B)
WRITE DDRF ($000B)
WRITE PTF ($000A)
READ PTF ($000A)
$000B
Bit 7
Figure 18-21. Data Direction Register F (DDRF)
0
Input/Output (I/O) Ports
DDRF6
6
0
Figure 18-22. Port F I/O Circuit
RESET
DDRF5
5
0
DDRF4
DDRFx
PTFx
4
0
DDRF3
MC68HC908LJ24/LK24 — Rev. 2.1
3
0
DDRF2
Freescale Semiconductor
Figure 18-22
2
0
DDRF1
1
0
shows
DDRF0
Bit 0
0
PTFx