mc68hc908lj24 Freescale Semiconductor, Inc, mc68hc908lj24 Datasheet - Page 355

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mc68hc908lj24

Manufacturer Part Number
mc68hc908lj24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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17.5.1 LCD Duty
17.5.2 LCD Voltages (V
17.5.3 LCD Cycle Frame
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
The setting of the LCD output waveform duty is dependent on the
number of backplane drivers required. Three LCD duties are available:
When the LCD driver module is enabled the backplane waveforms for
the selected duty are driven out of the backplane pins. The backplane
waveforms are periodic and are shown are shown in
Figure
The voltage V
V
waveforms. They are derived from V
Figure
The relative potential of the LCD voltages are:
The V
bits, LCCON[2:0].
The LCD driver module uses the CGMXCLK (see
(OSC))as the input reference clock. This clock is divided to produce the
LCD waveform base clock, LCDCLK, by configuring the LCLK[2:0] bits
in the LCD clock register. The LCDCLK clocks the backplane and the
frontplane output waveforms.
LCD2
LCD,
LCD3
Static duty — BP0 is used only
1/3 duty — BP0, BP1, and BP3 are used
1/4 duty — BP0, BP1, BP2, and BP3 are used
V
, and V
V
V
V
V
17-6, and
17-3).
LCD1,
LCD
LCD1
LCD2
LCD3
Liquid Crystal Display (LCD) Driver
bias voltage, V
= V
= 2/3 × (V
= 1/3 × (V
= V
V
LCD3
LCD
LCD2
DD
bias
Figure
is from the V
are internal bias voltages for the LCD driver
, V
LCD3
LCD
LCD
17-7.
bias
)
– V
– V
, is controlled by the LCD contrast control
LCD
bias
bias
)
)
pin and must not exceed V
LCD
using a resistor ladder (see
Liquid Crystal Display (LCD) Driver
Section 7. Oscillator
Functional Description
Figure
DD
17-5,
Data Sheet
. V
LCD1
355
,

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