mc68hc908lj24 Freescale Semiconductor, Inc, mc68hc908lj24 Datasheet - Page 422

• Manufacturer Part Number: mc68hc908lj24
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Low-Voltage Inhibit (LVI)
22.4 Functional Description
Data Sheet
422
$FE0F
Addr.
Low-Voltage Inhibit Status
Register Name
Register
(LVISR)
Figure 22-2
The LVI is enabled out of reset. The LVI module contains a bandgap
reference circuit and comparator. Clearing the LVI power disable bit,
LVIPWRD, enables the LVI to monitor V
reset disable bit, LVIRSTD, enables the LVI module to generate a reset
when V
mode bit, LVISTOP, enables the LVI to operate in stop mode.
Reset:
Read: LVIOUT
Write:
Figure 22-1. LVI I/O Register Summary
FROM CONFIG2
DETECTOR
LVISEL[1:0]
LOW V
DD
Bit 7
V
DD
0
falls below a voltage, V
DD
shows the structure of the LVI module.
DEFAULT
ENABLED
Low-Voltage Inhibit (LVI)
Figure 22-2. LVI Module Block Diagram
= Unimplemented
LVIIE
TO LVISR
LVIOUT
6
0
FROM CONFIG1
LVIPWRD
V
V
DD
DD
LVIIF
> V
≤ V
5
0
TRIPR
TRIPF
DETECT
LATCH
EDGE
= 1
= 0
LVIIACK
FROM LVISR
LVIIACK
TRIPF
4
0
0
CLR
STOP INSTRUCTION
FROM CONFIG1
. Setting the LVI enable in stop
FROM LVISR
DD
LVIRSTD
TO LVISR
MC68HC908LJ24/LK24 — Rev. 2.1
LVIIE
3
0
0
LVIIF
voltage. Clearing the LVI
Freescale Semiconductor
0
0
2
FROM CONFIG1
LVISTOP
LVI RESET
LVI
INTERRUPT
REQUEST
1
0
0
Bit 0
0
0