mc68hc908lj24 Freescale Semiconductor, Inc, mc68hc908lj24 Datasheet - Page 320

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mc68hc908lj24

Manufacturer Part Number
mc68hc908lj24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Multi-Master IIC Interface (MMIIC)
15.3 Features
15.4 I/O Pins
Data Sheet
320
Notes:
1. Do not enable the MMIIC function if the pin is used for KBI.
Generic Pin Names:
MMIIC
SDA
SCL
This Multi-master IIC module uses the SCL clock line and the SDA data
line to communicate with external DDC host or IIC interface. These two
pins are shared with port pins PTD6/KBI6 and PTD7/KBI7 respectively.
The outputs of SCL and SDA pins are open-drain type — no clamping
diode is connected between the pin and internal V
data rate typically is 750k-bps. The maximum communication length and
the number of devices that can be connected are limited by a maximum
bus capacitance of 400pF.
The MMIIC module uses two I/O pins, shared with standard port I/O pins.
The full name of the MMIIC I/O pins are listed in
pin name appear in the text that follows.
Table 15-1. Pin Name Conventions
Compatibility with multi-master IIC bus standard
Software controllable acknowledge bit generation
Interrupt driven byte by byte data transfer
Calling address identification interrupt
Auto detection of R/W bit and switching of transmit or receive
mode
Detection of START, repeated START, and STOP signals
Auto generation of START and STOP condition in master mode
Arbitration loss detection and No-ACK awareness in master mode
8 selectable baud rate master clocks
Automatic recognition of the received acknowledge bit
Multi-Master IIC Interface (MMIIC)
Full MCU Pin Names:
PTD7/KBI7/SDA
PTD6/KBI6/SCL
(1)
(1)
MMEN bit in MMCR ($006C)
MMEN bit in MMCR ($006C)
MC68HC908LJ24/LK24 — Rev. 2.1
Pin Selected for
IIC Function By:
Table
Freescale Semiconductor
DD
. The maximum
15-1. The generic

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