dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 122
dp83630sqx
Manufacturer Part Number
dp83630sqx
Description
Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83630SQX.pdf
(126 pages)
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Part Number:
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T2.31.1
T2.31.2
T2.31.3
T2.31.4
T2.31.5
Parameter
18.2.31 Single Clock MII (SCMII) Receive Timing
Note: Output delays assume a 25 pF load.
Note: CRS is asserted and de-asserted asynchronously relative to the reference clock.
Note: CRS ON delay is measured from the first bit of the JK symbol on the PMD Input Pair to assertion of CRS_DV.
Note: CRS OFF delay is measured from the first bit of the TR symbol on the PMD Input Pair to de-assertion of CRS_DV.
Note: Receive Latency is measured from the first bit of the symbol pair on the PMD Input Pair. Typical values are with the Elasticity Buffer set to the default value
(01).
X1 Clock Period
RXD[3:0], RX_DV and RX_ER output delay From X1 rising edge
CRS ON delay
CRS OFF delay
RXD[3:0] and RX_ER latency
Description
25 MHz Reference Clock
100BASE-TX mode
100BASE-FX mode
100BASE-TX mode
100BASE-FX mode
100BASE-TX mode
100BASE-FX mode
122
Notes
Min
2
Typ
40
19
26
16
56
46
9
Max
18
30136248
Units
bits
bits
bits
ns
ns
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