dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 78

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dp83630sqx

Manufacturer Part Number
dp83630sqx
Description
Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet

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15:14
11:9
Bit
7:0
14.4.10 Link Quality Data Register (LQDR), Page 2
This register provides read/write control of thresholds for the 100 Mb Link Quality Monitor function. The register also provides a
mechanism for reading current adapted parameter values. Threshold values may not be written if the device is powered-down.
13
12
8
SAMPLE_PARAM
LQ_PARAM_SEL
WRITE_LQ_THR
LQ_THR_DATA
LQ_THR_SEL
RESERVED
Bit Name
TABLE 48. Link Quality Data Register (LQDR), address 0x1E
1000 0000, RW
000, RW
Default
00, RO
0, RW
0, RW
0, RW
RESERVED: Writes ignored, read as 0.
Sample DSP Parameter:
Setting this bit to a 1 enables reading of current parameter values and initiates
sampling of the parameter value. The parameter to be read is selected by the
LQ_PARAM_SEL bits.
Write Link Quality Threshold:
Setting this bit will cause a write to the Threshold register selected by
LQ_PARAM_SEL and LQ_THR_SEL. The data written is contained in
LQ_THR_DATA. This bit will always read back as 0.
Link Quality Parameter Select:
This 3-bit field selects the Link Quality Parameter. This field is used for sampling
current parameter values as well as for reads/writes to Threshold values. The
following encodings are available:
000: DEQ_C1
001: DAGC
010: DBLW
011: Frequency Offset
100: Frequency Control
101: Variance most significant bits 31:16
Link Quality Threshold Select:
This bit selects the Link Quality Threshold to be read or written. A 0 selects the
Low threshold, while a 1 selects the high threshold. When combined with the
LQ_PARAM_SEL field, the following encodings are available
{LQ_PARAM_SEL, LQ_THR_SEL}:
000,0: DEQ_C1 Low
000,1: DEQ_C1 High
001,0: DAGC Low
001,1: DAGC High
010,0: DBLW Low
010,1: DBLW High
011,0: Frequency Offset Low
011,1: Frequency Offset High
100,0: Frequency Control Low
100,1: Frequency Control High
101,0: Variance High bits 7:0 (Variance bits 23:16)
101,1: Variance High bits 15:8 (Variance bits 31:24)
Link Quality Threshold Data:
The operation of this field is dependent on the value of the SAMPLE_PARAM
bit.
If SAMPLE_PARAM = 0:
On a write, this value contains the data to be written to the selected Link Quality
Threshold register.
On a read, this value contains the current data in the selected Link Quality
Threshold register.
If SAMPLE_PARAM = 1:
On a read, this value contains the sampled parameter value. This value will
remain unchanged until a new read sequence is started.
78
Description

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