dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 2

• Manufacturer Part Number: dp83630sqx
• Description: Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
• Manufacturer: National Semiconductor Corporation

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1.0 General Description ......................................................................................................................... 1
2.0 Applications .................................................................................................................................... 1
3.0 Features ........................................................................................................................................ 1
4.0 System Diagram .............................................................................................................................. 1
5.0 Block Diagram ................................................................................................................................ 6
6.0 Key IEEE 1588 Features .................................................................................................................. 6
7.0 Pin Layout ...................................................................................................................................... 9
8.0 Pin Descriptions ............................................................................................................................ 10
9.0 Configuration ................................................................................................................................ 18
6.1 IEEE 1588 SYNCHRONIZED CLOCK ......................................................................................... 7
6.2 PACKET TIMESTAMPS ........................................................................................................... 8
6.3 EVENT TRIGGERING AND TIMESTAMPING .............................................................................. 8
6.4 PTP INTERRUPTS .................................................................................................................. 8
6.5 GPIO ...................................................................................................................................... 8
8.1 SERIAL MANAGEMENT INTERFACE ...................................................................................... 10
8.2 MAC DATA INTERFACE ......................................................................................................... 10
8.3 CLOCK INTERFACE .............................................................................................................. 12
8.4 LED INTERFACE ................................................................................................................... 13
8.5 IEEE 1588 EVENT/TRIGGER/CLOCK INTERFACE ................................................................... 13
8.6 JTAG INTERFACE ................................................................................................................. 13
8.7 RESET AND POWER DOWN .................................................................................................. 14
8.8 STRAP OPTIONS .................................................................................................................. 15
8.9 10 Mb/s AND 100 Mb/s PMD INTERFACE ................................................................................ 16
8.10 POWER SUPPLY PINS ........................................................................................................ 17
8.11 PACKAGE PIN ASSIGNMENTS ............................................................................................. 17
9.1 MEDIA CONFIGURATION ...................................................................................................... 18
9.2 AUTO-NEGOTIATION ............................................................................................................ 18
9.3 AUTO-MDIX .......................................................................................................................... 19
9.4 AUTO-CROSSOVER IN FORCED MODE ................................................................................. 19
9.5 PHY ADDRESS ..................................................................................................................... 19
9.6 LED INTERFACE ................................................................................................................... 20
9.7 HALF DUPLEX vs. FULL DUPLEX ........................................................................................... 21
9.8 INTERNAL LOOPBACK .......................................................................................................... 22
9.9 POWER DOWN/INTERRUPT .................................................................................................. 22
9.10 ENERGY DETECT MODE ..................................................................................................... 22
9.11 LINK DIAGNOSTIC CAPABILITIES ........................................................................................ 22
6.1.1 IEEE 1588 Clock Output .................................................................................................. 7
6.1.2 IEEE 1588 Clock Input .................................................................................................... 8
6.2.1 IEEE 1588 Transmit Packet Parser and Timestamp ............................................................ 8
6.2.2 IEEE 1588 Receive Packet Parser and Timestamp ............................................................. 8
6.2.3 NTP Packet Timestamp .................................................................................................. 8
6.3.1 IEEE 1588 Event Triggering ............................................................................................. 8
6.3.2 IEEE 1588 Event Timestamping ....................................................................................... 8
9.2.1 Auto-Negotiation Pin Control .......................................................................................... 18
9.2.2 Auto-Negotiation Register Control ................................................................................... 18
9.2.3 Auto-Negotiation Parallel Detection ................................................................................. 19
9.2.4 Auto-Negotiation Restart ............................................................................................... 19
9.2.5 Enabling Auto-Negotiation via Software ........................................................................... 19
9.2.6 Auto-Negotiation Complete Time .................................................................................... 19
9.5.1 MII Isolate Mode ........................................................................................................... 20
9.5.2 Broadcast Mode ........................................................................................................... 20
9.6.1 LEDs .......................................................................................................................... 21
9.6.2 LED Direct Control ........................................................................................................ 21
9.9.1 Power Down Control Mode ............................................................................................ 22
9.9.2 Interrupt Mechanisms ................................................................................................... 22
9.11.1 Linked Cable Status .................................................................................................... 22
9.11.2 Link Quality Monitor .................................................................................................... 23
6.2.1.1 One-Step Operation .............................................................................................. 8
6.2.2.1 Receive Timestamp Insertion ................................................................................. 8
9.11.1.1 Polarity Reversal .............................................................................................. 22
9.11.1.2 Cable Swap Indication ....................................................................................... 22
9.11.1.3 100 Mb Cable Length Estimation ........................................................................ 22
9.11.1.4 Frequency Offset Relative to Link Partner ............................................................ 22
9.11.1.5 Cable Signal Quality Estimation .......................................................................... 23
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