dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 82

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dp83630sqx

Manufacturer Part Number
dp83630sqx
Description
Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet

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15:12
15:0
Bit
Bit
7:4
11
10
14.5.2 PTP Time Data Register (PTP_TDR), Page 4
This register provides a mechanism for reading and writing the 1588 Time and Trigger Control values. The function of this register
is determined by controls in the PTP_CTL register.
14.5.3 PTP Status Register (PTP_STS), Page 4
This register provides basic status and interrupt control for the PTP 1588 operation.
9
8
3
2
1
0
EVENT_RDY
TRIG_DONE
TIME_DATA
RESERVED
RESERVED
TXTS_RDY
RXTS_RDY
EVENT_IE
Bit Name
Bit Name
RXTS_IE
TXTS_IE
TRIG_IE
XXXX XXXX XXXX
XXXX XXXX XXXX
TABLE 51. PTP Time Data Register (PTP_TDR), address 0x15
TABLE 52. PTP Status Register (PTP_STS), address 0x16
0, RO/COR
XXXX, WO
XXXX, RO
0000, RO
0000, RO
Default
Default
0, RW
0, RW
0, RW
0, RW
0, RO
0, RO
0, RO
Time Data:
On Reads, successively returns 16-bit values of the Clock time or Trigger Control
information as selected by controls in the PTP Control Register. Additional reads
beyond the avaliable fields will always return 0.
On Writes, successively stores the 16-bit values of Clock time or Trigger Control
Information as selected by controls in the PTP Control Register.
Reserved: Writes ignored, Read as 0
Transmit Timestamp Ready:
A Transmit Timestamp is available for an outbound PTP Message. This bit will be
cleared upon read of the Transmit Timestamp if no other timestamps are ready.
Receive Timestamp Ready:
A Receive Timestamp is available for an inbound PTP Message. This bit will be
cleared upon read of the Receive Timestamp if no other timestamps are ready.
PTP Trigger Done:
A PTP Trigger has occured. This bit will be cleared upon read. This bit will only
be set if Trigger Notification is turned on for the Trigger through the Trigger
Configuration Registers.
PTP Event Timestamp Ready:
A PTP Event Timestamp is available. This bit will be cleared upon read of the PTP
Event Status Register if no other event timestamps are ready.
Reserved: Writes ignored, Read as 0
Transmit Timestamp Interrupt Enable:
Enable Interrupt on Transmit Timestamp Ready.
Receive Timestamp Interrupt Enable:
Enable Interrupt on Receive Timestamp Ready.
Trigger Interrupt Enable:
Enable Interrupt on Trigger Completion.
Event Interrupt Enable:
Enable Interrupt on Event Timestamp Ready.
82
Description
Description

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