peb20954 Infineon Technologies Corporation, peb20954 Datasheet - Page 106

• Manufacturer Part Number: peb20954
• Description: Smart Integrated Digital Echo Canceller Sidec
• Manufacturer: Infineon Technologies Corporation

Preliminary Data Sheet
5.2.4
CLKSTAT[5:0] (Addr.: 09H): Clock-Status
RFCLKEX
RFCLKN
RFCLKF
SCLKI
CLK16
CLK32
IRREQ[6:0] (Addr.: 08H): Interrupt-Request
WDOG
SYNCI
CA
TT
TE
UCC
TSM
Note: Each bit of this register will generate an interrupt at pin INT if activated (internally
set to ’1’). The bits and the pin INT are cleared after read. Setting of these bits by
activated source can be inhibited by masking in register IRMASK.
STATUS[6:0] (Addr.: 6EH): Status
Bits are reset when the interrupt source is no longer valid
WDOGPOLL
SYNCIPOLL
CAPOLL
TTPOLL
TEPOLL
-
-
-
Read Register
WDOG
WDOG
POLL
-
’1’: no valid 2 MHz clock available at pin RFCLKEX
’1’: no valid 2 MHz clock available at pin RFCLKN
’1’: no valid 2 MHz clock available at pin RFCLKF
’1’: no valid 8 MHz clock available at pin SCLKI
’1’: no valid 16MHz clock available at pin CLK16
’1’: no valid 32 MHz clock available at pin CLK32
’1’: Watchdog interrupt
’1’: SYNCI interrupt (no valid SYNCI detected)
’1’: H-register coefficient available for readout interrupt
’1’: Test termination because of enabled test timeslot interrupt
’1’: Timer expired interrupt
’1’: UCC interrupt
’1’: Timeslot monitor interrupt, reset when accessing
’1’: Watchdog status
’1’: SYNCI status (no valid SYNCI detected)
’1’: H-register coefficient available for readout status
’1’: Test termination because of enabled test timeslot status
’1’: Timer expired status
CTRLTSMON.MVAL
CLKEX
SYNCI
SYNCI
POLL
RF
CLKN
POLL
CA
RF
CA
106
CLKF
POLL
RF
TT
TT
SCLKI
POLL
TE
TE
Register Description
CLK16
POLL
UCC
UCC
PEB 20954
PEF 20954
CLK32
POLL
TSM
TSM
04.99