peb20954 Infineon Technologies Corporation, peb20954 Datasheet - Page 30

• Manufacturer Part Number: peb20954
• Description: Smart Integrated Digital Echo Canceller Sidec
• Manufacturer: Infineon Technologies Corporation

PEB 20954
PEF 20954
Functional Description
3.2.3
UCC Interface
The UCC Interface uses a clock frequency of 2048 kHz. The UCC Signal is structured
into frames (period 125 s) consisting of 32 channels (period 3.9 s) and a multiframe
consisting of 32 frames (period 4 ms). The multiframe is synchronized with the SYNCI
Input pulse. The SIDEC reads and writes (tristate controlled) only the channels 0 of the
frames. The 32 channels 0 of each multiframe are used to control and supervise the
associated PCM channels. UCC Frame 0 corresponds to PCM channel 0, UCC Frame
1 corresponds to PCM channel 1, .... This relation is depicted in Figure 10. It is also
possible to use one special UCC-Frame for a general purpose. With the registers
UCCMFR, UCCALIGN and PHALIGN[7:6] the UCC channel 0 of frame 0 can be shifted
to any channel and frame. Hence, up to 32 different devices can be connected in parallel
to the UCC Interface.
The output signal UCCO is always in phase with the UCCI input signal.
Preliminary Data Sheet
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04.99