pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 198

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

Register 33 TCT0
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Register WAR.Word64Sel(1:0) =’00’:
Bit
Bit
BufMaxNg(7:0)
BufEPDNg(7:0)
Data Sheet
15
7
TCT Transfer Register 0
14
Maximum Buffer Fill Threshold for a non-real-time traffic class
configuration (register TCT1, DwordSel=00).
The first cell exceeding this threshold is discarded and if also PPD
is enabled for this traffic class (register TCT1, DwordSel=00,
PPDen=1) PPD is applied on a per connection (LCI) basis.
The threshold is defined with a granularity of 1024 cells:
Threshold = BufMaxNg(7:0) * 1024 Cells
(register TCT1, DwordSel=’00’).
If the buffer fill exceeds this threshold and EPD is enabled for this
traffic class (register TCT1, DwordSel=00, EPDen=1) EPD is
applied on a per connection (LCI) basis.
The threshold is defined with a granularity of 1024 cells:
Threshold = BufEPDNg(7:0) * 1024Cells
EPD threshold for a non-real-time traffic class configuration
6
Read/Write
0000
TCT0
Written and Read by CPU to maintain the TCT table;
the meaning of register TCT0 depends on the bit field
’Word64Sel’ in WAR;
H
13
5
3E
BufEPDNg(7:0)
H
BufMaxNg(7:0)
12
4
198
11
3
10
2
Register Description
PXF 4333 V1.1
9
1
2001-12-17
ABM-3G
8
0