pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 45
pxf4333
Manufacturer Part Number
pxf4333
Description
Abm 3g Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PXF4333.pdf
(361 pages)
- Current page: 45 of 361
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Figure 3-3
3.1.1
At a given clock frequency, applied to the ABM-3G UTOPIA interfaces and the ABM-3G
core, the core is the limiting factor for throughput because it needs 32 clock cycles per
cell as opposed to UTOPIA, which needs only 27+2. The available speedup in the
ABM-3G relative to STM-4/OC12 transmission rates is shown in
Table 3-4
Data Sheet
Clock
Frequency
51.84
cells in
Throughput and Speedup
Logical Block Diagram (One Direction)
Maximum ABM-3G Throughput and Speedup
ARC
ABM-3G core Throughput
[Mbit/s]
(53 Byte Cells)
686.88
WFQ
Manager
Queue with Shaping Function
Scheduler Rate Shaping
Cyclic Mux
Weighted Fair Queueing Scheduler
Strict Priority Mux
Buffer
M
D
E
U
X
45
Global Real Time Bypass
Scheduler Block #0
Speedup relative to
STM-4/OC12 (599.04 Mbit/s)
1.146
Scheduler Block #1
Scheduler Block #127
Empty Cell Cycles
W
Q
F
Functional Description
Table
S
B
S
PXF 4333 V1.1
cells out
3-4.
2001-12-17
ABM-3G
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