dspic33fj128mc204 Microchip Technology Inc., dspic33fj128mc204 Datasheet - Page 18

• Manufacturer Part Number: dspic33fj128mc204
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

TABLE 1-1:
DS70291C-page 16
TMS
TCK
TDI
TDO
INDX1
QEA1
QEB1
UPDN1
INDX2
QEA2
QEB2
UPDN2
C1RX
C1TX
RTCC
CV
C1IN-
C1IN+
C1OUT
C2IN-
C2IN+
C2OUT
PMA0
PMA1
PMA2 -PMPA10
PMBE
PMCS1
PMD0-PMPD7
PMRD
PMWR
DAC1RN
DAC1RP
DAC1RM
DAC2RN
DAC2RP
DAC2RM
Legend: CMOS = CMOS compatible input or output
REF
Pin Name
ST = Schmitt Trigger input with CMOS levels
PPS = Peripheral Pin Select
PINOUT I/O DESCRIPTIONS (CONTINUED)
Type
Pin
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
TTL/ST
TTL/ST
TTL/ST
Buffer
CMOS
CMOS
Type
ANA
ANA
ANA
ANA
ANA
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
PPS
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
JTAG Test mode select pin.
JTAG test clock input pin.
JTAG test data input pin.
JTAG test data output pin.
Quadrature Encoder Index1 Pulse input.
Quadrature Encoder Phase A input in QEI1 mode. Auxiliary Timer
External Clock/Gate input in Timer mode.
Quadrature Encoder Phase A input in QEI1 mode. Auxiliary Timer
External Clock/Gate input in Timer mode.
Position Up/Down Counter Direction State.
Quadrature Encoder Index2 Pulse input.
Quadrature Encoder Phase A input in QEI2 mode. Auxiliary Timer
External Clock/Gate input in Timer mode.
Quadrature Encoder Phase A input in QEI2 mode. Auxiliary Timer
External Clock/Gate input in Timer mode.
Position Up/Down Counter Direction State.
ECAN1 bus receive pin.
ECAN1 bus transmit pin.
Real-Time Clock Alarm Output.
Comparator Voltage Reference Output.
Comparator 1 Negative Input.
Comparator 1 Positive Input.
Comparator 1 Output.
Comparator 2 Negative Input.
Comparator 2 Positive Input.
Comparator 2 Output.
Parallel Master Port Address Bit 0 Input (Buffered Slave modes) and
Output (Master modes).
Parallel Master Port Address Bit 1 Input (Buffered Slave modes) and
Output (Master modes).
Parallel Master Port Address (Demultiplexed Master Modes).
Parallel Master Port Byte Enable Strobe.
Parallel Master Port Chip Select 1 Strobe.
Parallel Master Port Data (Demultiplexed Master mode) or Address/
Data (Multiplexed Master modes).
Parallel Master Port Read Strobe.
Parallel Master Port Write Strobe.
DAC1 Negative Output.
DAC1 Positive Output.
DAC1 Output indicating middle point value (typically 1.65V).
DAC2 Negative Output.
DAC2 Positive Output.
DAC2 Output indicating middle point value (typically 1.65V).
Preliminary
Analog = Analog input
O = Output
TTL = TTL input buffer
Description
© 2009 Microchip Technology Inc.
P = Power
I = Input