dspic33fj128mc204 Microchip Technology Inc., dspic33fj128mc204 Datasheet - Page 49

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dspic33fj128mc204

Manufacturer Part Number

dspic33fj128mc204

Description

High-performance, 16-bit Digital Signal Controllers

Manufacturer

Microchip Technology Inc.

Datasheet

1.DSPIC33FJ128MC204.pdf (412 pages)

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TABLE 4-7:

TABLE 4-8:

OC1RS

OC1R

OC1CON

OC2RS

OC2R

OC2CON

OC3RS

OC3R

OC3CON

OC4RS

OC4R

OC4CON

Legend:

P1TCON

P1TMR

P1TPER

P1SECMP

PWM1CON1

PWM1CON2

P1DTCON1

P1DTCON2

P1FLTACON

P1OVDCON

P1DC1

P1DC2

P1DC3

Legend:

SFR Name

SFR Name

u = uninitialized bit, — = unimplemented, read as ‘0’

x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Addr

018C

0180

0182

0184

0186

0188

018A

018E

0190

0192

0194

0196

01C0

01C2

01C4

01C6

01C8

01CA

01CC

01CE

01D0

01D4

01D6

01D8

01DA

SFR

Addr

SFR

OUTPUT COMPARE REGISTER MAP

6-OUTPUT PWM1 REGISTER MAP

SEVTDIR

Bit 15

PTDIR

Bit 15

PTEN

—

—

—

—

DTBPS<1:0>

—

—

—

—

—

—

Bit 14

Bit 14

—

—

—

—

—

—

—

—

—

—

OCSIDL

OCSIDL

OCSIDL

OCSIDL

POVD3H POVD3L POVD2H

FAOV3H

Bit 13

PTSIDL

Bit 13

—

—

—

FAOV3L

Bit 12

Bit 12

—

—

—

—

—

—

—

—

Bit 11

FAOV2H

Bit 11

—

—

—

—

—

—

—

DTB<5:0>

Bit 10

FAOV2L

POVD2L

PMOD3

—

—

—

—

Bit 10

SEVOPS<3:0>

—

—

Bit 9

POVD1H

—

—

—

—

FAOV1H

PMOD2

Bit 9

—

—

Output Compare 1 Secondary Register

Output Compare 2 Secondary Register

Output Compare 3 Secondary Register

Output Compare 4 Secondary Register

PWM Duty Cycle #1 Register

PWM Duty Cycle #2 Register

PWM Duty Cycle #3 Register

Output Compare 1 Register

Output Compare 2 Register

Output Compare 3 Register

Output Compare 4 Register

PWM Special Event Compare Register

Bit 8

—

—

—

—

PWM Timer Count Value Register

FAOV1L

POVD1L

PMOD1

PWM Time Base Period Register

Bit 8

—

—

Bit 7

—

—

—

—

FLTAM

Bit 7

DTAPS<1:0>

—

—

—

—

Bit 6

—

—

—

—

PEN3H

Bit 6

PTOPS<3:0>

—

—

—

—

Bit 5

POUT3H

—

—

—

—

PEN2H

DTS3A

Bit 5

—

—

OCFLT

OCFLT

OCFLT

OCFLT

Bit 4

POUT3L

PEN1H

DTS3I

Bit 4

—

—

OCTSEL

OCTSEL

OCTSEL

OCTSEL

POUT2H

Bit 3

DTS2A

Bit 3

PTCKPS<1:0>

—

—

—

DTA<5:0>

POUT2L

Bit 2

PEN3L

FAEN3

DTS2I

Bit 2

IUE

OCM<2:0>

OCM<2:0>

OCM<2:0>

OCM<2:0>

POUT1H

OSYNC

PEN2L

DTS1A

FAEN2

Bit 1

Bit 1

PTMOD<1:0>

POUT1L

PEN1L

FAEN1

DTS1I

Bit 0

UDIS

Bit 0

Resets

Reset

xxxx

xxxx

0000

xxxx

xxxx

0000

xxxx

xxxx

0000

xxxx

xxxx

0000

State

0000

0000

0000

0000

00FF

0000

0000

0000

0000

FF00

0000

0000

0000

All

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