r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 263

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

The bus cycle can also be extended in burst access by inserting wait states. The wait state insertion
method and timing are the same as for full access. For details see section 6.7.9, Wait Control.
(2)
Even when burst operation is selected, it may happen that access to DRAM space is not
continuous, but is interrupted by access to another space. In this case, if the RAS signal is held low
during the access to the other space, burst operation can be resumed when the same row address in
DRAM space is accessed again.
• RAS Down Mode
Note: n = 2 to 5
Read
Write
To select RAS down mode, set both the RCDM bit and the BE bit to 1 in DRAMCR. If access
to DRAM space is interrupted and another space is accessed, the RAS signal is held low
during the access to the other space, and burst access is performed when the row address of the
next DRAM space access is the same as the row address of the previous DRAM space access.
Figure 6.44 shows an example of the timing in RAS down mode.
RAS Down Mode and RAS Up Mode
φ
Address bus
RASn (CSn)
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
Figure 6.43 Operation Timing in Fast Page Mode
T
Row address
p
T
r
(RAST = 0, CAST = 1)
High
High
T
c1
Column address 1
T
c2
Rev. 1.00 Sep. 19, 2008 Page 233 of 1342
T
c3
Section 6 Bus Controller (BSC)
T
c1
Column address 2
T
REJ09B0467-0100
c2
T
c3