r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 325

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r4f2456

Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Note:
Setting the DRMI bit in DRACCR to 1 enables an idle cycle to be inserted in the case of
consecutive read and write operations in DRAM/continuous synchronous DRAM space burst
access. Figures 6.93 and 6.94 show an example of the timing for idle cycle insertion in the case of
consecutive read and write accesses to DRAM/continuous synchronous DRAM space.
Previous Access
Normal space write
DRAM/continuous
synchronous
DRAM *
space write
*
Not supported by the H8S/2456 Group and H8S/2454 Group.
Next Access
Normal space read
DRAM/continuous
synchronous DRAM*
space read
Normal space read
DRAM/continuous
synchronous DRAM*
space read
ICIS2
0
1
0
1
0
1
0
1
ICIS1
ICIS0
Rev. 1.00 Sep. 19, 2008 Page 295 of 1342
DRMI
Section 6 Bus Controller (BSC)
IDLC
0
1
0
1
0
1
0
1
REJ09B0467-0100
Idle cycle
Disabled
1 state inserted
2 states inserted
Disabled
1 state inserted
2 states inserted
Disabled
1 state inserted
2 states inserted
Disabled
1 state inserted
2 states inserted

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