km4132g271b Samsung Semiconductor, Inc., km4132g271b Datasheet - Page 12

• Manufacturer Part Number: km4132g271b
• Description: 128k X 32bit X 2 Banks Synchronous Graphic Ram Lvttl
• Manufacturer: Samsung Semiconductor, Inc.

KM4132G271B
MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with MRS
Special Mode Register Programmed with SMRS
POWER UP SEQUENCE
1. Apply power and start clock, Attempt to maintain CKE= "H", DQM= "H" and the other pins are NOP condition at the inputs.
2. Maintain stable power, stable clock and NOP input condition for a minimum of 200us.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue a mode register set command to initialize the mode register.
cf.) Sequence of 4 & 5 may be changed.
The device is now ready for normal operation.
Note : 1. If A
Address
A
A
Address
Function
Function
0
0
1
1
0
1
8
9
2. The full column burst(256bit) is available only at Sequential mode of burst type.
3. If LC and LM both high(1), data of mask and color register will be unknown.
A
Write Burst Length
0
1
0
1
7
Test Mode
(Note 1)
Mode Register Set
9
Single Bit
is high during MRS cycle, "Burst Read Single Bit Write" function will be enabled.
W.B.L
Length
A
A
Burst
9
9
Vendor
Type
Only
Use
A
A
X
8
8
TM
A
0
0
0
0
1
1
1
1
6
A
A
A
0
0
1
1
0
0
1
1
5
7
7
CAS Latency
A
0
1
6
Load Color
A
0
1
0
1
0
1
0
1
4
Function
Disable
Enable
LC
A
A
Reserved
Reserved
Reserved
Reserved
Reserved
Latency
6
6
2
3
-
CAS Latency
A
0
1
- 12
5
Load Mask
LM
A
A
5
5
A
Function
0
1
Disable
Enable
3
Burst Type
(Note 3)
Sequential
Interleave
Type
A
A
4
4
A
BT
A
0
0
0
0
1
1
1
1
A
2
3
3
A
0
0
1
1
0
0
1
1
1
A
0
1
0
1
0
1
0
1
A
A
0
X
2
2
Burst Length
Rev. 2.4 (May 1998)
CMOS SGRAM
Reserved
Reserved
Reserved
256(Full)
Burst Length
BT=0
1
2
4
8
A
A
1
1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
BT=1
4
8
A
A
(Note 2)
0
0