km4132g271b Samsung Semiconductor, Inc., km4132g271b Datasheet - Page 43

• Manufacturer Part Number: km4132g271b
• Description: 128k X 32bit X 2 Banks Synchronous Graphic Ram Lvttl
• Manufacturer: Samsung Semiconductor, Inc.

KM4132G271B
CLOCK
Burst Read Single bit Write Cycle @Burst Length=2, BRSW
(CL=2)
(CL=3)
ADDR
DQM
DQ
CKE
RAS
CAS
DSF
DQ
WE
CS
A
A
9
8
*Note :
*Note 1
0
Row Active
(A-Bank)
RAa
RAa
1
1. BRSW mode is enabled by setting A
2. When BRSW write command with auto precharge is executed, keep it in mind that
3. WPB function is also possible at BRSW mode.
At the BRSW Mode, the burst length at write is fixed to "1" regardless of programed burst length.
Auto precharge is executed at the burst-end cycle, so in the case of BRSW write command,
the next cycle starts the precharge.
2
3
(A-Bank)
DAa0
Write
DAa0
CAa
4
Row Active
(B-Bank)
RBb
RBb
Auto Precharge
5
Read with
(A-Bank)
CAb
6
9
7
"High" at MRS (Mode Register Set).
QAb0
8
QAb1
QAb0
- 43
9
HIGH
QAb1
10
Row Active
(A-Bank)
RAc
RAc
Auto Precharge
11
Write with
(B-Bank)
DBc0
DBc0
CBc
12
13
*Note 2
(A-Bank)
Read
CAd
t
RAS
14
should not be violated.
15
QAd0
Rev. 2.4 (May 1998)
CMOS SGRAM
16
QAd1
QAd0
17
Precharge
(A-Bank)
QAd1
18
: Don t care
19