km4132g271b Samsung Semiconductor, Inc., km4132g271b Datasheet - Page 20

• Manufacturer Part Number: km4132g271b
• Description: 128k X 32bit X 2 Banks Synchronous Graphic Ram Lvttl
• Manufacturer: Samsung Semiconductor, Inc.

KM4132G271B
3. CAS Interrupt (I)
*Note :
DQ(CL2)
DQ(CL3)
1) Read interrupted by Read (BL=4)
2) Write interrupted by(Block) Write (BL=2)
4) Block Write to Block Write
CMD
CMD
ADD
ADD
CLK
CLK
CMD
ADD
CLK
DQ
DQ
1. By " Interrupt ", It is possible to stop burst read/write by external command before the end of burst.
2. t
3. t
4. Pixel :Pixel mask.
5. t
By "CAS Interrupt" , to stop burst read/write by CAS access ; read, write and block write.
CCD
CDL
BWC
: Last data in to new column address delay. (=1CLK)
: CAS to CAS delay. (=1CLK)
: Block write minimum cycle time.
Pixel
DA
BW
WR
RD
A
A
A
t
Note 3
t
t
Note 5
Note 2
0
t
CDL
CCD
BWC
CCD
Pixel
DB
WR
BW
RD
B
B
B
Note 2
0
Note 4
QA
DB
0
1
Note 1
QB
QA
0
0
QB
QB
DC
WR
C
t
Note 3
0
t
1
0
CDL
CCD
QB
Pixel
QB
BW
D
2
Note 2
1
Note 4
QB
QB
3
2
QB
- 20
3
DQ(CL2)
DQ(CL3)
3) Write interrupted by Read (BL=2)
DA
DA
WR
A
t
0
0
t
Note 3
CCD
CDL
RD
B
Note 2
QB
0
Rev. 2.4 (May 1998)
CMOS SGRAM
QB
QB
1
0
QB
1