km4132g271b Samsung Semiconductor, Inc., km4132g271b Datasheet - Page 42

• Manufacturer Part Number: km4132g271b
• Description: 128k X 32bit X 2 Banks Synchronous Graphic Ram Lvttl
• Manufacturer: Samsung Semiconductor, Inc.

CLOCK
KM4132G271B
Write Interrupted by Precharge Command & Write Burst Stop Cycle (@ Full page Only)
ADDR
DQM
CKE
RAS
CAS
DSF
WE
DQ
CS
A
A
9
8
*Note :
Row Active
0
(A-Bank)
RAa
RAa
1
1. At full page mode, burst is wrap-around at the end of burst. So auto precharge is impossible.
2. Data-in at the cycle of burst stop command cannot be written into the corresponding memory cell.
3. Data-in at the cycle of interrupted by precharge cannot be written into the corresponding memory cell.
4. Burst stop is valid only at full page burst length.
DQM should mask invalid input data on precharge command cycle when asserting precharge before end of burst.
It is defined by AC parameter of
It is defined by AC parameter of
DQM at write interrupted by precharge command is needed to ensure
Input data after Row precharge cycle will be masked internally.
2
3
(A-Bank)
*Note 1
Write
CAa
DAa0
4
DAa1
5
DAa2
6
t
t
BDL
RDL
DAa3
(=1CLK).
(=1CLK).
7
DAa4
*Note 2
8
Burst Stop
- 42
tBDL
9
HIGH
10
(A-Bank)
Write
*Note 1
DAb0
CAb
11
DAb1
t
RDL
12
DAb2
of 1CLK.
13
DAb3
14
DAb4
15
DAb5
*Note 3
Rev. 2.4 (May 1998)
CMOS SGRAM
16
Precharge
(A-Bank)
t
17
RDL
18
: Don t care
19