mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 40

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

3.0
3.1
PCM24 (T1) basic frames are 193 bits long and are transmitted at a frame repetition rate of 8000 Hz, which results
in an aggregate bit rate of 193 bits x 8000/sec =1.544 Mbits/sec. Basic frames are divided into 24 channels
numbered 1 to 24 and a framing bit; see Figure 4. Each timeslot is 8 bits in length and is transmitted most
significant bit first (numbered bit 1). This results in a single channel data rate of 8 bits x 8000/sec. = 64 kbit/s.
It should be noted that the Zarlink ST-BUS has 32 channels numbered 0 to 31 and the most significant bit of an
eight bit channel is numbered bit 7, see Figure 5. Therefore, ST-BUS bit 7 is synonymous with DS0 bit 1; bit 6 with
bit 2 and so on. See Zarlink Application note MSAN-126 for more details on the ST-BUS.
In the case of mapping ST-BUS to the PCM24 payload, only the first 24 channels and the last channel (31) of an
ST-BUS are used (see Table 1). Timeslot 31 S-bit is only used if TXSYNC bit Y00 is set. All unused channels are
tristate.
T1 Interface to the System Backplane
PCM24 Interface (T1)
CHANNEL
31 or 127
CHANNEL
24
(1/1.544) us
CHANNEL
BIT
S
Significant
0
Bit (First)
CHANNEL
Most
1
BIT
Figure 4 - PCM24 Link Frame Format (T1)
7
BIT 1
• • • • • • • • •
• • •
BIT
6
BIT 2
Figure 5 - ST-BUS Format
Zarlink Semiconductor Inc.
DS1 FRAME
BIT
125 us
5
MT9072
125µs
BIT 3
(8/2.048 or 8/8.192) µs
40
BIT
4
BIT 4
(8/1.544) us
CHANNEL
BIT
CHANNEL
3
30 or 126
23
BIT 5
BIT
2
CHANNEL
BIT 6
31 or 127
CHANNEL
24
BIT
1
BIT 7
BIT
BIT
0
S
CHANNEL
CHANNEL
Least
Significant
Bit (Last)
BIT 8
0
1
Data Sheet