mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 92

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mt9072av2

Manufacturer Part Number
mt9072av2
Description
Octal T1/e1/j1 Framer
Manufacturer
Zarlink Semiconductor
Datasheet

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14.1.7
The per channel conditioning capabilities of MT9072 are explained in this section. For the receiver the T1 data can
be replaced by the conditioning data (Y09) via the bit MPDR in the per channel control registers(Y90 to YA7).
This data will be output to the corresponding DSTo channel. The received data can be inverted on a per channel
basis by setting the RPCI bit (register Y90 to YA7). The transmit data can be inverted on a per channel basis with a
write to the control bit TPCI (registers Y90 to YA7). The transmit data can also be frozen on a per channel basis; in
this case the data from the DSTI is not used to update the Transmit Memory and the data written in Y0A is used as
the source (MPDT in registers Y90 to YA7).
Secondary D4 Yellow Alarm. This bit is set if 2 consecutive’1’s are
received in the S-bit position of the 12th frame of the D4
superframe.
AIS Alarm. This bit is set if fewer than 5 zeros are received in a 3
millisecond window.
ESFYEL.This bit is set if the ESF yellow alarm 0000000011111111
is receive in eight or more codewords out of ten in Bit Oriented
Message of FDL.
T1DM Received Yellow Alarm. If "Y" bit of the T1DM
Synchronization Word is received
Transmit ESF Yellow Alarm. Setting this bit (while in ESF mode)
causes a repeating pattern of eight 1’s followed by eight 0’s to be
insert onto the transmit FDL.
Transmit Secondary D4 Yellow Alarm. Setting this bit (in D4
mode) causes the S-bit of transmit frame 12 to be set.
Transmit All Ones. When low, this control bit forces a framed or
unframed (depending on the state of Transmit Alarm Control bit 0)
all ones to be transmit at TTIP and TRING
S-bit Override. If set, this bit forces the S-bits to be inserted as an
overlay on any of the following alarm conditions: i) transmit all ones,
ii) loop up code insertion, iii) loop down code insertion.
TT1DMY. If reset to low a yellow alarm is sent in the 24th channel if
the T1DM option is set.
T1 Per Timeslot Trunk Conditioning
Description
Table 46 - Alarm Control and Status Bits (T1)
Control/Status Register
Zarlink Semiconductor Inc.
MT9072
92
TESFYEL
SECYEL
TT1DMY
ESFYEL
TSECY
T1DRY
TAIS
AIS
SO
Bit
Address
Y10
Y10
Y10
Y10
Y02
Y02
Y02
Y02
Y02
SECYELI
ESFYELI
T1DMYI
Interrupt Status
AISI
NA
NA
NA
NA
NA
Bit
Register
Data Sheet
Address
Y35
Y35
Y35
Y35
NA
NA
NA
NA
NA

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