zl50110gag2 Zarlink Semiconductor, zl50110gag2 Datasheet - Page 4
zl50110gag2
Manufacturer Part Number
zl50110gag2
Description
1024 Channel 32 T1/e1, 2 T3/e3 Cesop Processor With Triple Ethernet Interface
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50110GAG2.pdf
(110 pages)
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Device Line Up
There are four products within the ZL50110/11/12/14 family, with capacity as shown in the following table:
Note 1: T1/E1/J2 is for unstructured mode, and the H-MVIP/H.110/ST-BUS is for structured mode.
ZL50114
ZL50110
ZL50112
ZL50111
Device
4 T1, 4 E1, or 1 J2 streams or
4 MVIP/ST-BUS streams at 2.048 Mbps or
1 H.110/H-MVIP/ST-BUS streams at
8.192 Mbps
8 T1, 8 E1 or 2 J2 streams or
8 MVIP/ST-BUS streams at 2.048 Mbps or
2 H.110/H-MVIP/ST-BUS streams at
8.192 Mbps
16 T1, 16 E1, 4 J2 streams or
16 MVIP/ST-BUS streams at 2.048 Mbps or
4 H.110/H-MVIP/ST-BUS streams at
8.192 Mbps
32 T1, 32 E1, 8 J2, 2 T3, 2 E3 streams or
32 MVIP/ST-BUS streams at 2.048 Mbps or
8 H.110/H-MVIP/ST-BUS streams at
8.192 Mbps
Table 1 - Capacity of Devices in the ZL50110/11/14 Family
TDM Interfaces
ZL50110/11/12/14
Zarlink Semiconductor Inc.
4
Dual 100 Mbps MII or
Dual Redundant 1000 Mbps GMII/TBI
Dual 100 Mbps MII or
Dual Redundant 1000 Mbps GMII/TBI
Triple 100 Mbps MII or
Dual Redundant 1000 Mbps GMII/TBI
or Single 100 Mbps MII and Single
1000 Mbps GMII/TBI
Triple 100 Mbps MII or
Dual Redundant 1000 Mbps GMII/TBI
or Single 100 Mbps MII and Single
1000 Mbps GMII/TBI
Ethernet Packet I/F
Data Sheet
Note 1
Note 1
Note 1
Note 1
Notes
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