ppc440gr-3jb667cz Applied Micro Circuits Corporation (AMCC), ppc440gr-3jb667cz Datasheet - Page 78

• Manufacturer Part Number: ppc440gr-3jb667cz
• Description: Powerpc 440gr Embedded Processor
• Manufacturer: Applied Micro Circuits Corporation (AMCC)

DDR SDRAM Write Operation
The following diagram illustrates the relationship among the signals involved with a DDR write operation.
Figure 9. DDR SDRAM Write Cycle Timing
Note:
78
Revision 1.19 – May 07, 2008
Preliminary Data Sheet
The timing data in the following tables is based on simulation runs using Einstimer.
MemClkOut0(90)
MemClkOut0
T
T
T
T
T
T
HD
SA
SD
DS
SK
HA
Addr/Cmd
MemData
PLB Clk
= Setup time for address and command signals to MemClkOut0(90)
= Delay from rising/falling edge of clock to the rising/falling edge of DQS
= Delay from rising edge of MemClkOut0(0) to rising/falling edge of signal (skew)
= Hold time for address and command signals from MemClkOut0(90)
= Setup time for data signals (minimum time data is valid before rising/falling edge of DSQ)
= Hold time for data signals (minimum time data is valid after rising/falling edge of DSQ)
DQS
T
SK
T
T
SA
HA
T
DS
440GR – PPC440GR Embedded Processor
T
SD
T
T
HD
DS
T
SD
T
HD
AMCC Proprietary