ort8850 Lattice Semiconductor Corp., ort8850 Datasheet - Page 12

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ort8850

Manufacturer Part Number
ort8850
Description
Field-programmable System Chip Fpsc Eight-channel X 850 Mbits/s Backplane Transceiver
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Figure 2. ORT8850 Embedded Core, Top Level Functionality and Data Flow
SONET Logic Blocks - Overview
The 850 Mbits/s SONET logic blocks allows the ORT8850 to communicate across a backplane or on a given board
at an aggregate speed of 6.8 Gbits/s, allowing high-speed asynchronous serial data transfer between system
devices. The external serial interfaces are implemented as eight channels of bidirectional 850 Mbits/s LVDS links
and use a pseudo-SONET framing protocol, which can be bypassed.
The SONET logic blocks are organized into two quads. Each quad supports four full duplex serial links (quad A
contains channels AA, AB, AC, and AD while quad B contains channels BA, BB, BC, and BD). A top level block dia-
gram of one channel of the SONET logic is shown in Figure 3.
Note: xx=[AA, AB,…BD]
DOUT xx[7:0]
FPGA Logic
DIN xx[7:0]
Embedded Core
SONET
Logic
Block
8
8
Reserved
Reserved
12
DEMUX
I/O
MUX
MUX
I/O
I/O
(DEMUX is internal to HSI &
SONET logic block)
LVDS I/O
LVDS I/O
Buffers
Buffers
ORCA ORT8850 Data Sheet
8
8
8
8
RXDxx_P_[P:N]
RXDxx_W_[P:N]
TXDxx_P_[P:N]
TXDxx_W_[P:N]

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