ort8850 Lattice Semiconductor Corp., ort8850 Datasheet - Page 74

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ort8850

Manufacturer Part Number
ort8850
Description
Field-programmable System Chip Fpsc Eight-channel X 850 Mbits/s Backplane Transceiver
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Lattice Semiconductor
LVDS Receiver Buffer Requirements
Table 30. Receiver DC Data
Table 31. LVDS Operating Parameters
Transmit Termination Resistor
Receiver Termination Resistor
Temperature Range
Power Supply V
Power Supply V
Power Supply V
Note: Under worst-case operating conditions, the LVDS driver will withstand a disabled or unpowered receiver for an unlimited period of time
without being damaged. Similarly, when outputs are short-circuited to each other or to ground, the LVDS will not suffer permanent damage.
The LVDS driver supports hot insertion. Under a well-controlled environment, the LVDS I/O can drive backplane as well as cable.
Input Voltage Range, VIA or VIB
Input Differential Threshold
Input Differential Hysteresis
Receiver Differential Input Impedance
1. V
DD
= 3.1V - 3.5V, 0 °C - 125 °C .
Parameter
DD
DD
SS
Parameter
33
15
1
Symbol
V
V
HYST
R
IDTH
V
IN
I
Test Conditions
⏐V
DC – 1 MHz
⏐V
450 MHz
(+V
With build-in termination,
center-tapped
GPD
GPD
IDTHH
⏐ < 925 mV
⏐ < 925 mV
Test Conditions
74
) – (–V
IDTHL
)
1.425
Min.
–40
3.0
80
80
ORCA ORT8850 Data Sheet
Normal
–100
Min.
100
100
0.0
25
80
0
Typ.
100
1.2
1.575
Max.
120
120
125
3.6
Max.
100
120
2.4
Units
Units
˚C
Ω
Ω
V
V
V
mV
mV
Ω
V

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