k4b2g0846b Samsung Semiconductor, Inc., k4b2g0846b Datasheet - Page 3

• Manufacturer Part Number: k4b2g0846b
• Description: 2gb B-die Ddr3 Sdram Specification
• Manufacturer: Samsung Semiconductor, Inc.

K4B2G04(08/16)46B
Table Contents
1.0 Ordering Information ....................................................................................................................5
2.0 Key Features ................................................................................................................................. 5
3.0 Package pinout/Mechanical Dimension & Addressing .............................................................6
4.0 Input/Output Functional Description ........................................................................................11
5.0 DDR3 SDRAM Addressing .........................................................................................................12
6.0 Absolute Maximum Ratings .......................................................................................................13
7.0 AC & DC Operating Conditions .................................................................................................13
8.0 AC & DC Input Measurement Levels .........................................................................................14
9.0 AC and DC Output Measurement Levels ..................................................................................19
3.1 x4 Package Pinout (Top view) : 78ball FBGA Package
3.2 x8 Package Pinout (Top view) : 78ball FBGA Package
3.3 x16 Package Pinout (Top view) : 96ball FBGA Package
3.4 FBGA Package Dimension (x4/x8)
3.5 FBGA Package Dimension (x16)
6.1 Absolute Maximum DC Ratings
6.2 DRAM Component Operating Temperature Range
7.1 Recommended DC operating Conditions (SSTL_1.5)
8.1 AC and DC Logic input levels for single-ended signals
8.2 V
8.3 AC and DC Logic Input Levels for Ditterential Signals
8.4 Differential Input Cross Point Voltage
8.5 Slew Rate Definition for Single Ended Input Signals
8.6 Slew rate definition for Differential Input Signals
9.1 Single Ended AC and DC Output Levels
9.2 Differential AC and DC Output Levels
9.3.Single Ended Output Slew Rate
9.4 Differential Output Slew Rate
9.5 Reference Load for AC Timing and Output Slew Rate
9.6 Overshoot/Undershoot Specification
9.7 34 ohm Output Driver DC Electrical Characteristics
9.8 On-Die Termination (ODT) Levels and I-V Characteristics
9.9 ODT Timing Definitions
8.3.1 Differential signal definition
8.3.2 Differential swing requirement for clock (CK - CK) and strobe (DQS - DQS)
8.3.3 Single-ended requirements for differential signals
9.6.1 Address and Control Overshoot and Undershoot specifications
9.6.2 Clock, Data, Strobe and Mask Overshoot and Undershoot specifications
9.7.1 Output Drive Temperature and Voltage sensitivity
9.8.1 ODT DC electrical characteristics
9.8.2 ODT Temperature and Voltage sensitivity
9.9.1 Test Load for ODT Timings
9.9.2 ODT Timing Definition
REF
Tolerances
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2Gb DDR3 SDRAM
Rev. 1.0 December 2008
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