k4b2g0846b Samsung Semiconductor, Inc., k4b2g0846b Datasheet - Page 37
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k4b2g0846b
Manufacturer Part Number
k4b2g0846b
Description
2gb B-die Ddr3 Sdram Specification
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K4B2G0846B.pdf
(61 pages)
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K4B2G04(08/16)46B
[Table 39] IDD7 Measurement - Loop Pattern
Note :
1. DM must be driven LOW all the time. DQS, DQS are used according to RD Commands, otheerwise MID-LEVEL.
2. Burst Sequence driven on each DQ signal by Read Command. Outside burst operation. DQ signals are MID-LEVEL.
10
12
13
14
15
16
17
18
19
11
0
1
2
3
4
5
6
7
8
9
2*nFAW+nRRD+1
2*nFAW+nRRD+2
2*nFAW+2*nRRD
2*nFAW+3*nRRD
2*nFAW+4*nRRD
3*nFAW+2*nRRD
3*nFAW+3*nRRD
3*nFAW+4*nRRD
nFAW+2*nRRD
nFAW+3*nRRD
nFAW+4*nRRD
2*nFAW+nRRD
3*nFAW+nRRD
nFAW+nRRD
2*nFAW+0
2*nFAW+1
2*nFAW+2
nRRD + 1
nRRD + 2
2 * nRRD
3 * nRRD
4 * nRRD
3*nFAW
nRRD
nFAW
...
...
0
1
2
repeat above D Command until nRRD - 1
repeat above D Command until 2*nRRD-1
repeat Sub-Loop 0, but BA[2:0] = 2
repeat Sub-Loop 1, but BA[2:0] = 3
Assert and repeat above D Command until nFAW - 1, if necessary
repeat Sub-Loop 0, but BA[2:0] = 4
repeat Sub-Loop 1, but BA[2:0] = 5
repeat Sub-Loop 0, but BA[2:0] = 6
repeat Sub-Loop 1, but BA[2:0] = 7
Assert and repeat above D Command until 2*nFAW - 1, if necessary
Repeat above D Command until 2*nFAW + nRRD - 1
Repeat above D Command until 2*nFAW + 2*nRRD - 1
repeat Sub-Loop 10, but BA[2:0] = 2
repeat Sub-Loop 11, but BA[2:0] = 3
Assert and repeat above D Command until 3*nFAW - 1, if necessary
repeat Sub-Loop 10, but BA[2:0] = 4
repeat Sub-Loop 11, but BA[2:0] = 5
repeat Sub-Loop 10, but BA[2:0] = 6
repeat Sub-Loop 11, but BA[2:0] = 7
Assert and repeat above D Command until 4*nFAW - 1, if necessary
ACT
RDA
ACT
RDA
ACT
RDA
ACT
RDA
D
D
D
D
D
D
D
D
1
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
Page 37 of 61
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
3
7
0
0
0
1
1
1
3
7
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2Gb DDR3 SDRAM
Rev. 1.0 December 2008
0
0
0
F
F
F
F
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
00000000
00000000
00110011
00110011
-
-
-
-
-
-
-
-
-
-
-
-