k4b2g0846b Samsung Semiconductor, Inc., k4b2g0846b Datasheet - Page 58
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k4b2g0846b
Manufacturer Part Number
k4b2g0846b
Description
2gb B-die Ddr3 Sdram Specification
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K4B2G0846B.pdf
(61 pages)
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K4B2G04(08/16)46B
Figure 25 - Illustration of nominal slew rate and tVAC for setup time tDS (for DQ with respect to strobe) and tIS
Note :Clock and Strobe are drawn on a different time scale.
(for ADD/CMD with respect to clock).
V
V
V
V
Setup Slew Rate
V
V
IL
IL
Falling Signal
REF
DDQ
IH
IH
(DC) max
(AC) max
(DC) min
(AC) min
(DC)
DQS
DQS
CK
CK
V
SS
V
region
REF
=
Delta TF
to ac
V
REF
(DC) - V
Delta TF
nominal slew
tDS
tIS
IL
rate
tVAC
(AC)max
Page 58 of 61
tDH
tIH
Setup Slew Rate
Rising Signal
Delta TR
nominal
slew rate
tDS
tIS
tVAC
=
V
IH
(AC)min - V
tDH
tIH
V
Delta TR
REF
region
2Gb DDR3 SDRAM
to ac
Rev. 1.0 December 2008
REF
(DC)