vpx3224d ETC-unknow, vpx3224d Datasheet - Page 31

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vpx3224d

Manufacturer Part Number
vpx3224d
Description
Video Pixel Decoders
Manufacturer
ETC-unknow
Datasheet
Micronas
PRELIMINARY DATA SHEET
2.12.3. Slicer Functions
The data slicer is inserted between the video ADC and
the video output interface (see Fig. 1–1). It operates
completely independent of the video front-end proces-
sing and has its own sync separator and a separate set
of I
block diagram of the digital data slicer.
2.12.3.1. Input
The slicer receives an 8-bit digitized FBAS signal which
is clamped to the back porch level. The teletext signal
amplitude can vary to a certain degree ( 3 dB), as the
slicer will adapt its internal slice level.
2.12.3.2. Automatic Adaptation
The slicer measures certain signal characteristics as DC
offset, level, bandwith, and phase error. A digital filter at
the input stage is used to compensate bandwith effects
of the transmission channel. A DC shifter generates a
DC free text signal even in case of co-channel interfer-
ence. The internal slice level is adapted to the teletext
signal level.
The adaption algorithm is designed for the signal char-
acteristics of a WST or NABTS transmission. For text
systems with significantly different signal characteristics
(like CAPTION), the adaption should be disabled.
The teletext sampling rate is generated by a phase accu-
mulator running at 20.25 MHz, which is synchronized
Fig. 2–35: Slicer block diagram
2
C registers. Figure 2–35 shows a more detailed
Dout
8
Formatter
Bit Slicer
Filter
DIN
8
Dval
20.25 MHz
I
2
Digital
Text
Slicer
C Register
I
2
Sync
C Bus
during framing code and clock run-in. The increment of
the phase accumulator is programmable and can be
used to set up any bit rate with the formula:
2.12.3.3. Standard Selection
The main teletext service can be received in VBI lines
only or in every line of each field (full-field mode). All
parameters needed to identify a teletext service are
programmable.
The slicer uses a reference of 24 bits to identify a teletext
service. This reference is compared with the first
received teletext bits which are often named clock run-in
(CRI) and framing code (FRC). If there is a match, the
slicer will start signal adaptation and write the following
data to the output stage. The reference can be reduced
in length by setting a mask for services which do not
have a 16-bit clock run-in. Bit errors can be allowed by
setting a tolerance level for every byte of the reference.
Additionally, the slicer can switch to other teletext
services during dedicated lines of the VBI. These can be
line 16 for VPS, line 21 for CAPTION, or line 23 for WSS.
In this case, the parameters are hard wired. Table 2–13
shows with which I
programmed and what the fixed settings for the side ser-
vices are.
2.12.3.4. Output
The slicer delivers a synchronous burst of decoded
teletext data bytes together with a data valid signal. This
data stream is fed into the video FIFO of the VPX back-
end. The data rate depends on the teletext bit rate
(divided by 8), the length of the burst is programmable.
The burst can optionally be extended to 64 bytes inde-
pendently of the selected teletext service (fill64 mode).
The dummy bytes needed to fill the burst to 64 bytes are
delivered at a rate of 20.25 MHz. Normally, there is no
output during lines without text transmission or unknown
text signals. For some applications, it is necessary to
have constant memory mapping. Therefore, the slicer
can be forced to output 64 bytes per line even if no text
is detected (dump mode).
The first 3 bytes of the data burst carry information to
identify the received teletext service. The 2 byte line
number contains a free running frame counter which can
be used to identify data loss in the framebuffer of a cap-
ture application. The field bit can be used to identify field
dependent services such as CAPTION. The 10-bit line
number corresponds to the standard line counting
scheme of a PAL composite video signal; in case of
NTSC, the value “3” is subtracted.
increment = 2048 * bit rate/20.25 MHz
VPX 3225D, VPX 3224D
2
C registers the text parameters are
31

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