vpx3224d ETC-unknow, vpx3224d Datasheet - Page 59

• Manufacturer Part Number: vpx3224d
• Description: Video Pixel Decoders
• Manufacturer: ETC-unknow

Micronas
PRELIMINARY DATA SHEET
4.3.10.1. TTL Output Driver Description
The driving capability/strength is controlled by the state
of the two I
A special PVDD, PVSS supply is used only to support
the digital output pins. This means, inherently, that in
case of tri-state conditions, external sources should not
drive these signals above the voltage PVDD which sup-
plies the output pins.
All timing specifications are based on the following as-
sumptions:
– the load capacitance of the fast pins (output driver ty-
– the load capacitance of the remaining pins (output
– no static currents are assumed,
– the driving capability of the pads is STR = 4, which
The typical case specification relates to:
– the ambient temperature is T
– the power supply of the pad circuits is PVDD = 3.3 V,
The best case specification relates to:
– a junction temperature of T
– the power supply of the pad circuits is PVDD = 3.6 V,
The worst case specification relates to:
– a junction temperature of T
– the power supply of the pad circuits is PVDD = 3.0 V,
Rise times are specified as a transition between 0.6 V to
2.4 V. Fall times are defined as a transition between
2.4 V to 0.6 V.
pe A) is C
driver type B) is C
means that 5 of 8 output drivers are enabled.
to a junction temperature of T
and the power supply of the digital parts is VDD =
5.0 V.
and the power supply of the digital parts is VDD =
5.25 V.
and the power supply of the digital parts is VDD =
4.75 V.
2
A
C registers F8
= 30 pF,
B
= 50 pF,
hex
J
J
and F9
= 0 C,
= 125 C,
A
J
= 25 C, which relates
= 70 C;
hex
.
Fig. 4–1: Block diagram of the output stages
Note: The drivers of the output pads are implemented
as a parallel connection of 8 tri-state buffers of the
same size. The buffers are enabled depending on the
desired driver strength. This opportunity offers the ad-
vantage of adapting the driver strength to on-chip and
off-chip constraints, e.g. to minimize the noise result-
ing from steep signal transitions.
strength = 7
strength w 6
strength w 5
strength w 4
strength w 3
strength w 2
strength w 1
strength w 0
VPX 3225D, VPX 3224D
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