EPM570 Altera, EPM570 Datasheet - Page 19

• Manufacturer Part Number: EPM570
• Description: MAX II Device Family
• Manufacturer: Altera

Altera Corporation
December 2004
Figure 2–9
adder. One portion of the LUT generates the sum of two bits using the
input signals and the appropriate carry-in bit; the sum is routed to the
output of the LE. The register can be bypassed for simple adders or used
for accumulator functions. Another portion of the LUT generates carry-
out bits. An LAB-wide carry-in bit selects which chain is used for the
addition of given inputs. The carry-in signal for each chain, carry-in0
or carry-in1, selects the carry-out to carry forward to the carry-in
signal of the next-higher-order bit. The final carry-out signal is routed to
an LE, where it is fed to local, row, or column interconnects.
Core Version a.b.c variable
shows the carry-select circuitry in an LAB for a 10-bit full
MAX II Device Handbook, Volume 1
MAX II Architecture
2–13