EPM570 Altera, EPM570 Datasheet - Page 59

• Manufacturer Part Number: EPM570
• Description: MAX II Device Family
• Manufacturer: Altera

Figure 4–3. ESD Protection During Positive Voltage Zap
Altera Corporation
December 2004
I/O
When the I/O pin receives a negative ESD zap at the pin that is less than
-0.7 V (0.7 V is the voltage drop across a diode), the intrinsic
P-Substrate/N+ drain diode is forward biased. Hence, the discharge ESD
current path is from GND to the I/O pin, as shown in
GND
Core Version a.b.c variable
Source
Drain
Drain
Source
NMOS
PMOS
Hot Socketing & Power-On Reset in MAX II Devices
Gate
Gate
P-Substrate
MAX II Device Handbook, Volume 1
N+
N+
D
S
GND
I/O
G
Figure
4–4.
4–5