EPM570 Altera, EPM570 Datasheet - Page 82

• Manufacturer Part Number: EPM570
• Description: MAX II Device Family
• Manufacturer: Altera

Timing Model & Specifications
5–20
MAX II Device Handbook, Volume 1
Note to
(1)
t
t
t
t
t
t
t
t
f
PD1
PD2
SU
H
CO
CH
CL
CNT
CNT
Table 5–24. EPM570 Global Clock External I/O Timing Parameters
Symbol
The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay
performs faster than this global clock input pin maximum frequency.
Table 5–24
Worst case
pin to pin
delay through
1 look-up
table (LUT)
Best case pin
to pin delay
through 1
LUT
Global clock
setup time
Global clock
hold time
Global clock
to output
delay
Global clock
high time
Global clock
low time
Minimum
global clock
period for
16-bit
counter
Maximum
global clock
frequency for
16-bit
counter
Parameter
:
Table 5–24
devices.
Condition
10 pF
10 pF
10 pF
Core Version a.b.c variable
shows the external I/O timing parameters for EPM570
-3 Speed Grade
Min
170
170
1.4
0.0
2.0
3.3
304.0
Max
5.5
3.7
4.5
(1)
-4 Speed Grade
Min
221
221
1.9
0.0
2.0
4.0
249.9
Max
7.1
4.8
5.9
-5 Speed Grade
Min
272
272
2.3
0.0
2.0
4.9
Altera Corporation
202.9
December 2004
Max
8.8
6.0
7.2
MHz
Unit
ns
ns
ns
ns
ns
ps
ps
ns