MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 102

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MC68HC711PH8

Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
5
5.6.4
The bits in SCSR1 indicate certain conditions in the SCI hardware and are automatically cleared
by special acknowledge sequences.
TDRE — Transmit data register empty flag
This flag is set when SCDR is empty. Clear the TDRE flag by reading SCSR1 with TDRE set and
then writing to SCDR.
TC — Transmit complete flag
This flag is set when the transmitter is idle (no data, preamble, or break transmission in progress).
Clear the TC flag by reading SCSR1 with TC set and then writing to SCDR.
RDRF — Receive data register full flag
Once cleared, IDLE is not set again until the RXD line has been active and becomes idle again.
RDRF is set if a received character is ready to be read from SCDR. Clear the RDRF flag by
reading SCSR1 with RDRF set and then reading SCDR.
IDLE — Idle line detected flag
This flag is set if the RXD line is idle. Once cleared, IDLE is not set again until the RXD line has
been active and becomes idle again. The IDLE flag is inhibited when RWU = 1. Clear IDLE by
reading SCSR1 with IDLE set and then reading SCDR.
MOTOROLA
5-10
SCI1 status 1 (SCSR1)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
SCSR1 — SCI status register 1
SCDR empty.
SCDR busy.
Transmitter idle.
Transmitter busy.
SCDR full.
SCDR empty.
RXD line is idle.
RXD line is active.
SERIAL COMMUNICATIONS INTERFACE
Address
$0074
TDRE
bit 7
bit 6
TC
RDRF
bit 5
IDLE
bit 4
bit 3
OR
bit 2
NF
bit 1
FE
MC68HC11PH8
bit 0
PF
1100 0000
on reset
State
TPG

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