MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 159

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

8.1.8.1
Four of this register’s bits control an 8-bit pulse accumulator system. Another bit enables either the
OC5 function or the IC4 function, while two other bits select the rate for the real-time interrupt system.
Bits [7, 3] — Not implemented; always read zero
PAEN — Pulse accumulator system enable
PAMOD — Pulse accumulator mode
PEDGE — Pulse accumulator edge control
This bit has different meanings depending on the state of the PAMOD bit, as shown:
I4/O5 — Input capture 4/output compare 5
RTR[1:0] — RTI interrupt rate selects (refer to Section 8.1.5)
MC68HC11PH8
Pulse accumulator control (PACTL)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
PACTL — Pulse accumulator control register
–
–
–
Pulse accumulator enabled.
Pulse accumulator disabled.
Gated time accumulation mode.
Event counter mode.
Input capture 4 function is enabled (no OC5).
Output compare 5 function is enabled (no IC4)
PAMOD PEDGE
0
0
1
1
Address
$0026
0
1
0
1
bit 7
0
TIMING SYSTEM
PAI falling edge increments the counter.
PAI rising edge increments the counter.
A zero on PAI inhibits counting.
A one on PAI inhibits counting.
PAEN PAMOD PEDGE
bit 6
Action of clock
bit 5
bit 4
bit 3
0
I4/O5
bit 2
RTR1
bit 1
RTR0 0000 0000
bit 0
MOTOROLA
on reset
State
TPG
8-25
8