MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 124

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MC68HC711PH8

Manufacturer Part Number
MC68HC711PH8
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
Manufacturer
Motorola
Datasheet
7
7.2
During an SPI transfer, data is simultaneously transmitted and received. A serial clock line
synchronizes shifting and sampling of the information on the two serial data lines. A slave select
line allows individual selection of a slave SPI device; slave devices that are not selected do not
interfere with SPI bus activities. On a master SPI device, the select line can optionally be used to
indicate a multiple master bus contention. Refer to Figure 7-2.
MOTOROLA
7-2
OPT2 Ð Options register 2
2
SPI interrupt
request
4
system clock
Divider
8
Select
MCU
SPI transfer formats
16
32
SPSR Ð SPI status register
SPI control
64 128
SPI clock (master)
SERIAL PERIPHERAL INTERFACE
Figure 7-1 SPI block diagram
MSTR
SPE
SPIE
8-bit shift register
Shift control logic
Read data buffer
Internal bus
SPCR Ð SPI control register
Clock
logic
SPDR Ð SPI data register
M
M
S
S
M
S
control
logic
Pin
MC68HC11PH8
MISO
MOSI
SCK
PD2
PD3
PD4
PD5
SS
TPG

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